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Patent applications and USPTO patent grants for Sawai; Katsunori.The latest application filed is for "4-2 compressor circuit and voltage holding circuit for use in 4-2 compressor circuit".
Patent | Date |
---|---|
4-2 compressor circuit and voltage holding circuit for use in 4-2 compressor circuit Grant 6,308,195 - Hirase , et al. October 23, 2 | 2001-10-23 |
Co-ordinates input device and a method for producing the same Grant 6,225,577 - Sawai , et al. May 1, 2 | 2001-05-01 |
Clock generator and clock generating method capable of varying clock frequency without increasing the number of delay elements Grant 6,049,238 - Shimizu , et al. April 11, 2 | 2000-04-11 |
Bus interface unit in a microprocessor for facilitating internal and external memory accesses Grant 5,915,099 - Takata , et al. June 22, 1 | 1999-06-22 |
Clock generating circuit, PLL circuit, semiconductor device, and methods for designing and making the clock generating circuit Grant 5,801,559 - Sawai , et al. September 1, 1 | 1998-09-01 |
Microcomputer Grant 5,787,310 - Shimizu , et al. July 28, 1 | 1998-07-28 |
Cache memory with test function Grant 5,165,029 - Sawai , et al. November 17, 1 | 1992-11-17 |
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