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name:-0.012415170669556
name:-0.00049901008605957
Savithri; Nagaraj Patent Filings

Savithri; Nagaraj

Patent Applications and Registrations

Patent applications and USPTO patent grants for Savithri; Nagaraj.The latest application filed is for "multi-mode circuit and a method for preventing degradation in the multi-mode circuit".

Company Profile
0.11.3
  • Savithri; Nagaraj - Richardson TX
  • Savithri; Nagaraj - Plano TX
  • Savithri; Nagaraj - Dallas TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Determination of clock path delays and implementation of a circuit design
Grant 10,289,784 - Hwang , et al.
2019-05-14
Timing verification in a programmable circuit design using variation factors
Grant 10,162,916 - Narasimha , et al. Dec
2018-12-25
Area-efficient performance monitors for adaptive voltage scaling
Grant 9,915,696 - Savithri , et al. March 13, 2
2018-03-13
Speed model tuning for programmable integrated circuits with consideration of device yield, simulated frequency of operation, and speed of device components
Grant 9,885,750 - Savithri February 6, 2
2018-02-06
Generation of delay values for a simulation model of circuit elements in a clock network
Grant 9,639,640 - Savithri , et al. May 2, 2
2017-05-02
Testing critical paths of a circuit design
Grant 9,501,604 - More , et al. November 22, 2
2016-11-22
Determination of path delays in circuit designs
Grant 9,405,871 - Savithri , et al. August 2, 2
2016-08-02
Interconnect speed model characterization in programmable integrated circuits
Grant 9,372,948 - Savithri June 21, 2
2016-06-21
Generating delay values for different contexts of a circuit
Grant 9,065,446 - Savithri , et al. June 23, 2
2015-06-23
Multi-mode circuit and a method for preventing degradation in the multi-mode circuit
Grant 8,013,635 - Jain , et al. September 6, 2
2011-09-06
Multi-mode Circuit And A Method For Preventing Degradation In The Multi-mode Circuit
App 20110193588 - JAIN; Palkesh ;   et al.
2011-08-11
Method for positioning sub-resolution assist features
Grant 7,694,269 - Savithri , et al. April 6, 2
2010-04-06
Fabrication Management System
App 20090250698 - Savithri; Nagaraj
2009-10-08
Method For Positioning Sub-resolution Assist Features
App 20080203518 - Savithri; Nagaraj ;   et al.
2008-08-28

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