loadpatents
Patent applications and USPTO patent grants for Savareigo; Nissim.The latest application filed is for "reduction of false alarms in pcb inspection".
Patent | Date |
---|---|
Reduction Of False Alarms In Pcb Inspection App 20070165939 - Savareigo; Nissim ;   et al. | 2007-07-19 |
Reduction of false alarms in PCB inspection Grant 7,177,458 - Savareigo , et al. February 13, 2 | 2007-02-13 |
Electrical circuit conductor inspection Grant 7,006,212 - Savareigo , et al. February 28, 2 | 2006-02-28 |
Electrical circuit conductor inspection App 20050134842 - Savareigo, Nissim ;   et al. | 2005-06-23 |
Electrical circuit conductor inspection Grant 6,870,611 - Savareigo , et al. March 22, 2 | 2005-03-22 |
Post etch inspection system Grant 6,656,374 - Savareigo December 2, 2 | 2003-12-02 |
Optical inspection of laser vias Grant 6,621,572 - Savareigo September 16, 2 | 2003-09-16 |
Optical inspection of laser vias App 20030025907 - Savareigo, Nissim | 2003-02-06 |
Electrical circuit conductor inspection App 20030020905 - Savareigo, Nissim ;   et al. | 2003-01-30 |
Electrical circuit conductor inspection App 20020039182 - Savareigo, Nissim ;   et al. | 2002-04-04 |
Method for detecting line width defects in electrical circuit inspection App 20020038510 - Savareigo, Nissim ;   et al. | 2002-04-04 |
Post etch inspection system App 20010035267 - Savareigo, Nissim | 2001-11-01 |
Optical inspection of laser vias App 20010028454 - Savareigo, Nissim | 2001-10-11 |
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