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name:-0.084542036056519
name:-0.074130058288574
name:-0.0037510395050049
Satoh; Kimihiro Patent Filings

Satoh; Kimihiro

Patent Applications and Registrations

Patent applications and USPTO patent grants for Satoh; Kimihiro.The latest application filed is for "cross-point mram including self-compliance selector".

Company Profile
3.76.70
  • Satoh; Kimihiro - Wilsonville OR
  • Satoh; Kimihiro - Fremont CA
  • Satoh; Kimihiro - Beaverton OR
  • Satoh; Kimihiro - Portland OR
  • Satoh; Kimihiro - Santa Clara CA
  • Satoh; Kimihiro - Howpewell Junction NY
  • Satoh; Kimihiro - Hopewell Junction NY
  • Satoh; Kimihiro - Hopewell Jct NY
  • Satoh, Kimihiro - Hopewell Jet NY
  • Satoh, Kimihiro - Hopewell NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Cross-Point MRAM Including Self-Compliance Selector
App 20210312964 - Wei; Zhiqiang ;   et al.
2021-10-07
Three-dimensional nonvolatile memory
Grant 10,818,731 - Satoh October 27, 2
2020-10-27
Magnetic memory incorporating dual selectors
Grant 10,522,590 - Satoh , et al. Dec
2019-12-31
Magnetic Memory Incorporating Dual Selectors
App 20190288031 - Satoh; Kimihiro ;   et al.
2019-09-19
Selector device incorporating conductive clusters for memory applications
Grant 10,224,367 - Yang , et al.
2019-03-05
Method for sensing memory element coupled to selector device
Grant 10,153,017 - Yang , et al. Dec
2018-12-11
Spin-orbitronics device and applications thereof
Grant 10,008,540 - Keshtbod , et al. June 26, 2
2018-06-26
Method for Sensing Memory Element Coupled to Selector Device
App 20180075891 - Yang; Hongxin ;   et al.
2018-03-15
Selector Device Incorporating Conductive Clusters for Memory Applications
App 20170338279 - Yang; Hongxin ;   et al.
2017-11-23
Memory device incorporating selector element with multiple thresholds
Grant 9,812,499 - Satoh , et al. November 7, 2
2017-11-07
Landing pad in peripheral circuit for magnetic random access memory (MRAM)
Grant 9,793,318 - Satoh , et al. October 17, 2
2017-10-17
Spin-orbitronics Device And Applications Thereof
App 20170236868 - Keshtbod; Parviz ;   et al.
2017-08-17
Spin-orbitronics device and applications thereof
Grant 9,647,032 - Wang , et al. May 9, 2
2017-05-09
Three dimensional memory arrays and stitching thereof
Grant 9,627,438 - Satoh , et al. April 18, 2
2017-04-18
Memory device with increased separation between memory elements
Grant 9,548,448 - Satoh , et al. January 17, 2
2017-01-17
Landing Pad in Peripheral Circuit for Magnetic Random Access Memory (MRAM)
App 20160276406 - Satoh; Kimihiro ;   et al.
2016-09-22
Landing pad in peripheral circuit for magnetic random access memory (MRAM)
Grant 9,373,663 - Satoh , et al. June 21, 2
2016-06-21
Spin-orbitronics Device And Applications Thereof
App 20160064650 - Wang; Xiaobin ;   et al.
2016-03-03
Memory device having stitched arrays of 4 F.sup.2 memory cells
Grant 9,209,390 - Satoh , et al. December 8, 2
2015-12-08
MTJ stack and bottom electrode patterning process with ion beam etching using a single mask
Grant 9,166,154 - Satoh , et al. October 20, 2
2015-10-20
Semiconductor memory device having increased separation between memory elements
Grant 9,123,575 - Satoh , et al. September 1, 2
2015-09-01
Three-dimensional flash memory device
Grant 9,112,051 - Satoh August 18, 2
2015-08-18
MEMORY DEVICE HAVING STITCHED ARRAYS OF 4 F+hu 2 +l MEMORY CELLS
App 20150214278 - Satoh; Kimihiro ;   et al.
2015-07-30
Vialess memory structure and method of manufacturing same
Grant 9,082,695 - Satoh , et al. July 14, 2
2015-07-14
Fabrication method for high-density MRAM using thin hard mask
Grant 9,070,869 - Jung , et al. June 30, 2
2015-06-30
Memory device having stitched arrays of 4 F.sup.2 memory cells
Grant 9,029,824 - Satoh , et al. May 12, 2
2015-05-12
High density resistive memory having a vertical dual channel transistor
Grant 9,029,822 - Satoh , et al. May 12, 2
2015-05-12
MRAM with sidewall protection and method of fabrication
Grant 9,013,045 - Satoh , et al. April 21, 2
2015-04-21
Fabrication Method For High-density Mram Using Thin Hard Mask
App 20150104882 - Jung; Dong Ha ;   et al.
2015-04-16
Landing Pad In Peripheral Circuit For Magnetic Random Access Memory (mram)
App 20150084140 - Satoh; Kimihiro ;   et al.
2015-03-26
Method for forming MTJ memory element
Grant 8,975,089 - Jung , et al. March 10, 2
2015-03-10
MRAM etching processes
Grant 8,975,088 - Satoh , et al. March 10, 2
2015-03-10
Method of manufacturing magnetic tunnel junction memory element
Grant 8,962,349 - Chen , et al. February 24, 2
2015-02-24
Redeposition Control in MRAM Fabrication Process
App 20150014801 - Satoh; Kimihiro ;   et al.
2015-01-15
Mtj Memory Cell With Protection Sleeve And Method For Making Same
App 20150014800 - Satoh; Kimihiro ;   et al.
2015-01-15
MEMORY DEVICE HAVING STITCHED ARRAYS OF 4 F+hu 2 +l MEMORY CELLS
App 20140339626 - Satoh; Kimihiro ;   et al.
2014-11-20
Memory device having vertical selection transistors with shared channel structure and method for making the same
Grant 8,890,108 - Satoh , et al. November 18, 2
2014-11-18
Redeposition control in MRAM fabrication process
Grant 8,883,520 - Satoh , et al. November 11, 2
2014-11-11
Memory device having stitched arrays of 4 F.sup.2 memory cells
Grant 8,878,156 - Satoh , et al. November 4, 2
2014-11-04
Access transistor with a buried gate
Grant 8,803,200 - Satoh , et al. August 12, 2
2014-08-12
Method for manufacturing high density non-volatile magnetic memory
Grant 8,802,451 - Malmhall , et al. August 12, 2
2014-08-12
MRAM with sidewall protection and method of fabrication
Grant 8,796,795 - Satoh , et al. August 5, 2
2014-08-05
MRAM with Sidewall Protection and Method of Fabrication
App 20140210103 - Satoh; Kimihiro ;   et al.
2014-07-31
MTJ MRAM with stud patterning
Grant 8,772,888 - Jung , et al. July 8, 2
2014-07-08
Mtj Stack And Bottom Electrode Patterning Process With Ion Beam Etching Using A Single Mask
App 20140170776 - Satoh; Kimihiro ;   et al.
2014-06-19
High Density Resistive Memory Having A Vertical Dual Channel Transistor
App 20140138609 - Satoh; Kimihiro ;   et al.
2014-05-22
Memory Device Having Stitched Arrays Of 4 F Memory Cells
App 20140138600 - SATOH; Kimihiro ;   et al.
2014-05-22
Twin MONOS Array for High Speed Application
App 20140133244 - Satoh; Kimihiro ;   et al.
2014-05-15
Twin MONOS Array for High Speed Application
App 20140133245 - Satoh; Kimihiro ;   et al.
2014-05-15
Access transistor with a buried gate
Grant 8,723,281 - Satoh , et al. May 13, 2
2014-05-13
Method for reading and writing multi-level cells
Grant 8,724,380 - Zhou , et al. May 13, 2
2014-05-13
MRAM with sidewall protection and method of fabrication
Grant 8,709,956 - Satoh , et al. April 29, 2
2014-04-29
Memory device including transistor array with shared plate channel and method for making the same
Grant 8,704,206 - Satoh , et al. April 22, 2
2014-04-22
Mtj Mram With Stud Patterning
App 20140042567 - Jung; Dong Ha ;   et al.
2014-02-13
Field Effect Transistor Having A Trough Channel
App 20140035069 - Satoh; Kimihiro ;   et al.
2014-02-06
Access Transistor With A Buried Gate
App 20140027830 - Satoh; Kimihiro ;   et al.
2014-01-30
Twin MONOS array for high speed application
Grant 8,633,544 - Satoh , et al. January 21, 2
2014-01-21
Redeposition Control in MRAM Fabrication Process
App 20130341801 - Satoh; Kimihiro ;   et al.
2013-12-26
Mram Etching Processes
App 20130337582 - Satoh; Kimihiro ;   et al.
2013-12-19
MRAM fabrication method with sidewall cleaning
Grant 8,574,928 - Satoh , et al. November 5, 2
2013-11-05
Resistive memory device having vertical transistors and method for making the same
Grant 8,575,584 - Satoh , et al. November 5, 2
2013-11-05
MRAM Fabrication Method with Sidewall Cleaning
App 20130267042 - Satoh; Kimihiro ;   et al.
2013-10-10
Method For Manufacturing High Density Non-volatile Magnetic Memory
App 20130244344 - Malmhall; Roger Klas ;   et al.
2013-09-19
MRAM etching processes
Grant 8,536,063 - Satoh , et al. September 17, 2
2013-09-17
Memory Device Having Vertical Selection Transistors With Shared Channel Structure And Method For Making The Same
App 20130126819 - Satoh; Kimihiro ;   et al.
2013-05-23
Memory Device Including Transistor Array With Shared Plate Channel And Method For Making The Same
App 20130126823 - SATOH; Kimihiro ;   et al.
2013-05-23
Method For Fabrication Of A Magnetic Random Access Memory (mram) Using A High Selectivity Hard Mask
App 20130075840 - Satoh; Kimihiro ;   et al.
2013-03-28
Resistive Memory Device Having Vertical Transistors And Method For Making The Same
App 20130056698 - Satoh; Kimihiro ;   et al.
2013-03-07
Mram etching processes
App 20130052752 - Satoh; Kimihiro ;   et al.
2013-02-28
Trench MONOS memory cell and array
Grant 8,379,453 - Satoh February 19, 2
2013-02-19
MRAM with sidewall protection and method of fabrication
App 20130032907 - Satoh; Kimihiro ;   et al.
2013-02-07
MRAM with sidewall protection and method of fabrication
App 20130032775 - Satoh; Kimihiro ;   et al.
2013-02-07
Vialess Memory Structure And Method Of Manufacturing Same
App 20120306033 - Satoh; Kimihiro ;   et al.
2012-12-06
Trough channel transistor and methods for making the same
App 20120306005 - Satoh; Kimihiro ;   et al.
2012-12-06
Magnetic booster for magnetic random access memory
Grant 8,320,175 - Mani , et al. November 27, 2
2012-11-27
Access Transistor With A Buried Gate
App 20120241826 - Satoh; Kimihiro ;   et al.
2012-09-27
Trench MONOS memory cell and array
App 20120063230 - Satoh; Kimihiro
2012-03-15
Trench monos memory cell and array
Grant 8,081,515 - Satoh December 20, 2
2011-12-20
Magnetic Booster For Magnetic Random Access Memory
App 20100220524 - Mani; Krishnakumar ;   et al.
2010-09-02
MRAM design with local write conductors of reduced cross-sectional area
Grant 7,787,289 - Mani , et al. August 31, 2
2010-08-31
Trench monos memory cell and array
App 20090251973 - Satoh; Kimihiro
2009-10-08
Mram Design With Local Write Conductors Of Reduced Cross-sectional Area
App 20090141542 - Mani; Krishnakumar ;   et al.
2009-06-04
Twin insulator charge storage device operation and its fabrication method
Grant 7,411,247 - Ogura , et al. August 12, 2
2008-08-12
Twin MONOS array for high speed application
App 20080186763 - Satoh; Kimihiro ;   et al.
2008-08-07
Twin insulator charge storage device operation and its fabrication method
Grant 7,394,703 - Ogura , et al. July 1, 2
2008-07-01
Twin insulator charge storage device operation and its fabrication method
Grant 7,391,653 - Ogura , et al. June 24, 2
2008-06-24
Twin insulator charge storage device operation and its fabrication method
Grant 7,382,662 - Ogura , et al. June 3, 2
2008-06-03
Twin insulator charge storage device operation and its fabrication method
Grant 7,382,659 - Ogura , et al. June 3, 2
2008-06-03
Twin insulator charge storage device operation and its fabrication method
Grant 7,359,250 - Ogura , et al. April 15, 2
2008-04-15
Twin MONOS array for high speed application
Grant 7,352,033 - Satoh , et al. April 1, 2
2008-04-01
Twin insulator charge storage device operation and its fabrication method
App 20070114597 - Ogura; Seiki ;   et al.
2007-05-24
Nonvolatile memory array organization and usage
Grant 7,190,603 - Ogura , et al. March 13, 2
2007-03-13
Twin MONOS array for high speed application
App 20070047309 - Satoh; Kimihiro ;   et al.
2007-03-01
Twin insulator charge storage device operation and its fabrication method
Grant 7,170,132 - Ogura , et al. January 30, 2
2007-01-30
Twin insulator charge storage device operation and its fabrication method
App 20060227622 - Ogura; Seiki ;   et al.
2006-10-12
Stitch and select implementation in twin MONOS array
Grant 7,118,961 - Ogura , et al. October 10, 2
2006-10-10
Twin insulator charge storage device operation and its fabrication method
App 20060221706 - Ogura; Seiki ;   et al.
2006-10-05
Twin insulator charge storage device operation and its fabrication method
App 20060203562 - Ogura; Seiki ;   et al.
2006-09-14
Twin insulator charge storage device operation and its fabrication method
App 20060198200 - Ogura; Seiki ;   et al.
2006-09-07
Twin insulator charge storage device operation and its fabrication method
App 20060187709 - Ogura; Seiki ;   et al.
2006-08-24
Twin insulator charge storage device operation and its fabrication method
Grant 7,046,556 - Ogura , et al. May 16, 2
2006-05-16
Array architecture and operation methods for a nonvolatile memory
Grant 7,006,378 - Saito , et al. February 28, 2
2006-02-28
Twin NAND device structure, array operations and fabrication method
Grant 6,998,658 - Ogura , et al. February 14, 2
2006-02-14
Nonvolatile memory array organization and usage
App 20050248984 - Ogura, Seiki ;   et al.
2005-11-10
Twin insulator charge storage device operation and its fabrication method
App 20050164451 - Ogura, Seiki ;   et al.
2005-07-28
Twin insulator charge storage device operation and its fabrication method
App 20050145928 - Ogura, Seiki ;   et al.
2005-07-07
Twin insulator charge storage device operation and its fabrication method
Grant 6,900,098 - Ogura , et al. May 31, 2
2005-05-31
Simplified twin monos fabrication method with three extra masks to standard CMOS
Grant 6,838,344 - Satoh , et al. January 4, 2
2005-01-04
Twin NAND device structure, array operations and fabrication method
Grant 6,825,084 - Ogura , et al. November 30, 2
2004-11-30
Simplified twin monos fabrication method with three extra masks to standard CMOS
App 20040219751 - Satoh, Kimihiro ;   et al.
2004-11-04
Stitch and select implementation in twin MONOS array
App 20040166630 - Ogura, Tomoko ;   et al.
2004-08-26
Stitch and select implementation in twin MONOS array
Grant 6,759,290 - Ogura , et al. July 6, 2
2004-07-06
Simplified twin monos fabrication method with three extra masks to standard CMOS
Grant 6,756,271 - Satoh , et al. June 29, 2
2004-06-29
Twin NAND device structure, array operations and fabrication method
App 20040092066 - Ogura, Seiki ;   et al.
2004-05-13
Twin NAND device structure, array operations and fabrication method
App 20040087087 - Ogura, Seiki ;   et al.
2004-05-06
Twin NAND device structure, array operations and fabrication method
Grant 6,670,240 - Ogura , et al. December 30, 2
2003-12-30
Twin MONOS cell fabrication method and array organization
App 20030143792 - Satoh, Kimihiro ;   et al.
2003-07-31
Twin MONOS cell fabrication method and array organization
Grant 6,531,350 - Satoh , et al. March 11, 2
2003-03-11
Twin NAND device structure, array operations and fabrication method
App 20030032243 - Ogura, Seiki ;   et al.
2003-02-13
Twin monos cell fabrication method and array organization
App 20020137296 - Satoh, Kimihiro ;   et al.
2002-09-26

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