SARTORIUS; Thomas Andrew

Patent Applications and Registrations

Patent applications and USPTO patent grants for SARTORIUS; Thomas Andrew.The latest application filed is for "obsoleting values stored in registers in a processor based on processing obsolescent register-encoded instructions".

Company Profile

0.102.100

SARTORIUS; Thomas Andrew - Raleigh NC
Sartorius; Thomas Andrew - San Diego CA
Sartorius; Thomas Andrew - Releigh NC

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Obsoleting Values Stored In Registers In A Processor Based On Processing Obsolescent Register-encoded Instructions App 20220066779 - SARTORIUS; Thomas Andrew ; et al.	2022-03-03
Obsoleting values stored in registers in a processor based on processing obsolescent register-encoded instructions Grant 11,188,334 - Sartorius , et al. November 30, 2	2021-11-30
Providing exception stack management using stack panic fault exceptions in processor-based devices Grant 11,175,926 - Sartorius , et al. November 16, 2	2021-11-16
Providing Exception Stack Management Using Stack Panic Fault Exceptions In Processor-based Devices App 20210318884 - SARTORIUS; Thomas Andrew ; et al.	2021-10-14
Load instruction with final read indicator field to invalidate a buffer or cache entry storing the memory address holding load data Grant 11,126,437 - Sartorius , et al. September 21, 2	2021-09-21
Providing Express Memory Obsolescence In Processor-based Devices App 20210173655 - SARTORIUS; Thomas Andrew ; et al.	2021-06-10
Obsoleting Values Stored In Registers In A Processor Based On Processing Obsolescent Register-encoded Instructions App 20210165658 - SARTORIUS; Thomas Andrew ; et al.	2021-06-03
Externally programmable memory management unit Grant 10,114,756 - Koob , et al. October 30, 2	2018-10-30
Prefetch Mechanisms With Non-equal Magnitude Stride App 20180173631 - SARTORIUS; Thomas Andrew ; et al.	2018-06-21
Write-allocation For A Cache Based On Execute Permissions App 20170255569 - SARTORIUS; Thomas Andrew ; et al.	2017-09-07
Early conditional selection of an operand Grant 9,710,269 - Dieffenderfer , et al. July 18, 2	2017-07-18
Method And Apparatus For Cache Line Deduplication Via Data Matching App 20170091117 - CAIN, III; Harold Wade ; et al.	2017-03-30
Systems and methods of executing multiple hypervisors using multiple sets of processors Grant 9,606,818 - Plondke , et al. March 28, 2	2017-03-28
Branch Target Instruction Cache (btic) To Store A Conditional Branch Instruction App 20170083333 - CHOUDHARY; Niket Kumar ; et al.	2017-03-23
Method and apparatus for cache tag compression Grant 9,514,061 - Pellerin, III , et al. December 6, 2	2016-12-06
Method And Apparatus For Cache Tag Compression App 20160342530 - PELLERIN, III; Henry Arthur ; et al.	2016-11-24
Method and apparatus for selective renaming in a microprocessor Grant 9,471,325 - Krishna , et al. October 18, 2	2016-10-18
Multi-core page table sets of attribute fields Grant 9,436,616 - Sharp , et al. September 6, 2	2016-09-06
Methods and apparatus for improving performance of semaphore management sequences across a coherent bus Grant 9,292,442 - Speier , et al. March 22, 2	2016-03-22
Memory management unit with pre-filling capability Grant 9,092,358 - Rychlik , et al. July 28, 2	2015-07-28
Method and apparatus to save and restore system memory management unit (MMU) contexts Grant 9,086,813 - Zeng , et al. July 21, 2	2015-07-21
Flexible hardware module assignment for enhanced performance Grant 9,026,681 - Park , et al. May 5, 2	2015-05-05
Enforcing strongly-ordered requests in a weakly-ordered processing Grant 9,026,744 - Hofmann , et al. May 5, 2	2015-05-05
Flexible Hardware Module Assignment For Enhanced Performance App 20150046604 - Park; Hee-Jun ; et al.	2015-02-12
Method and apparatus for generating return address predictions for implicit and explicit subroutine calls using predecode information Grant 8,943,300 - Stempel , et al. January 27, 2	2015-01-27
Multiple sets of attribute fields within a single page table entry Grant 8,938,602 - Sharp , et al. January 20, 2	2015-01-20
Method And Apparatus For Selective Renaming In A Microprocessor App 20150019843 - KRISHNA; Anil ; et al.	2015-01-15
Configuring surrogate memory accessing agents using non-priviledged processes Grant 8,924,685 - Sartorius December 30, 2	2014-12-30
Multi-core Page Table Sets Of Attribute Fields App 20140331023 - Sharp; Colin Christopher ; et al.	2014-11-06
Methods and apparatus for saving conditions prior to a reset for post reset evaluation Grant 8,880,860 - Sartorius , et al. November 4, 2	2014-11-04
Methods And Apparatus For Improving Performance Of Semaphore Management Sequences Across A Coherent Bus App 20140310468 - Speier; Thomas Philip ; et al.	2014-10-16
Externally Programmable Memory Management Unit App 20140281332 - Koob; Christopher Edward ; et al.	2014-09-18
Systems And Methods Of Executing Multiple Hypervisors App 20140282508 - Plondke; Erich James ; et al.	2014-09-18
Method And Apparatus To Save And Restore System Memory Management Unit (mmu) Contexts App 20140282580 - Zeng; Thomas M. ; et al.	2014-09-18
Auto-ordering of strongly ordered, device, and exclusive transactions across multiple memory regions Grant 8,782,356 - Panavich , et al. July 15, 2	2014-07-15
Power efficient instruction prefetch mechanism Grant 8,661,229 - Sartorius , et al. February 25, 2	2014-02-25
Multiple Sets Of Attribute Fields Within A Single Page Table Entry App 20140040593 - Sharp; Colin Christopher ; et al.	2014-02-06
Methods and systems for checking run-time integrity of secure code cross-reference to related applications Grant 8,639,943 - Bridges , et al. January 28, 2	2014-01-28
Qualifying Software Branch-Target Hints with Hardware-Based Predictions App 20140006752 - Morrow; Michael William ; et al.	2014-01-02
Cache locking without interference from normal allocations Grant 8,527,713 - Augsburg , et al. September 3, 2	2013-09-03
Auto-Ordering of Strongly Ordered, Device, and Exclusive Transactions Across Multiple Memory Regions App 20130151799 - Panavich; Jason Lawrence ; et al.	2013-06-13
Methods and Apparatus for Saving Conditions Prior to a Reset for Post Reset Evaluation App 20130145137 - Sartorius; Thomas Andrew ; et al.	2013-06-06
Apparatus and methods to reduce castouts in a multi-level cache hierarchy Grant 8,386,716 - Speier , et al. February 26, 2	2013-02-26
Methods and apparatus for issuing memory barrier commands in a weakly ordered storage system Grant 8,352,682 - Speier , et al. January 8, 2	2013-01-08
Debug circuit comparing processor instruction set operating mode Grant 8,352,713 - Burke , et al. January 8, 2	2013-01-08
Memory Management Unit With Pre-Filling Capability App 20120226888 - Rychlik; Bohuslav ; et al.	2012-09-06
Address translation method and apparatus Grant 8,239,657 - Kopec , et al. August 7, 2	2012-08-07
Preloading instructions from an instruction set other than a currently executing instruction set Grant 8,145,883 - Sartorius , et al. March 27, 2	2012-03-27
Apparatus and Methods to Reduce Castouts in a Multi-Level Cache Hierarchy App 20120059995 - Speier; Thomas Philip ; et al.	2012-03-08
Methods and system for resolving simultaneous predicted branch instructions Grant 8,082,428 - Smith , et al. December 20, 2	2011-12-20
Apparatus and methods to reduce castouts in a multi-level cache hierarchy Grant 8,078,803 - Speier , et al. December 13, 2	2011-12-13
Configuring Surrogate Memory Accessing Agents Using Non-Priviledged Processes App 20110283083 - Sartorius; Thomas Andrew	2011-11-17
Apparatus and Methods to Reduce Duplicate Line Fills in a Victim Cache App 20110202727 - Speier; Thomas Philip ; et al.	2011-08-18
System and method for using a working global history register Grant 7,984,279 - Stempel , et al. July 19, 2	2011-07-19
Method and apparatus for managing instruction flushing in a microprocessor's instruction pipeline Grant 7,949,861 - McIlvaine , et al. May 24, 2	2011-05-24
Method and apparatus for prefetching non-sequential instruction addresses Grant 7,917,731 - Stempel , et al. March 29, 2	2011-03-29
Methods and Apparatus for Issuing Memory Barrier Commands in a Weakly Ordered Storage System App 20100306470 - Speier; Thomas Philip ; et al.	2010-12-02
Sliding-window, block-based branch target address cache Grant 7,827,392 - Smith , et al. November 2, 2	2010-11-02
Virtually-tagged instruction cache with physically-tagged behavior Grant 7,802,055 - Sartorius , et al. September 21, 2	2010-09-21
Preloading Instructions from an Instruction Set Other than a Currently Executing Instruction Set App 20100169615 - Sartorius; Thomas Andrew ; et al.	2010-07-01
Speculative instruction issue in a simultaneously multithreaded processor Grant 7,725,684 - Augsburg , et al. May 25, 2	2010-05-25
Latency insensitive FIFO signaling protocol Grant 7,725,625 - Dockser , et al. May 25, 2	2010-05-25
Translation lookaside buffer manipulation Grant 7,721,067 - Kopec , et al. May 18, 2	2010-05-18
System, method and software to preload instructions from an instruction set other than one currently executing Grant 7,711,927 - Sartorius , et al. May 4, 2	2010-05-04
Method and system for providing an energy efficient register file Grant 7,698,536 - Dieffenderfer , et al. April 13, 2	2010-04-13
Efficient interrupt return address save mechanism Grant 7,681,022 - Sartorius , et al. March 16, 2	2010-03-16
System, method and software to preload instructions from a variable-length instruction set with proper pre-decoding Grant 7,676,659 - Stempel , et al. March 9, 2	2010-03-09
Use of register renaming system for forwarding intermediate results between constituent instructions of an expanded instruction Grant 7,669,039 - McIlvaine , et al. February 23, 2	2010-02-23
Methods and System for Resolving Simultaneous Predicted Branch Instructions App 20100023696 - Smith; Rodney Wayne ; et al.	2010-01-28
Method and apparatus for managing cache partitioning using a dynamic boundary Grant 7,650,466 - Stempel , et al. January 19, 2	2010-01-19
Methods and Systems for Checking Run-Time Integrity of Secure Code Cross-Reference to Related Applications App 20090313695 - Bridges; Jeffrey Todd ; et al.	2009-12-17
System and method wherein conditional instructions unconditionally provide output Grant 7,624,256 - Sartorius , et al. November 24, 2	2009-11-24
Segmented pipeline flushing for mispredicted branches Grant 7,624,254 - Smith , et al. November 24, 2	2009-11-24
Methods and system for resolving simultaneous predicted branch instructions Grant 7,617,387 - Smith , et al. November 10, 2	2009-11-10
Method and apparatus for performing an atomic semaphore operation Grant 7,610,463 - Speier , et al. October 27, 2	2009-10-27
Power efficient instruction prefetch mechanism Grant 7,587,580 - Sartorius , et al. September 8, 2	2009-09-08
Power Efficient Instruction Prefetch Mechanism App 20090210663 - Sartorius; Thomas Andrew ; et al.	2009-08-20
Instruction cache having fixed number of variable length instructions Grant 7,568,070 - Bridges , et al. July 28, 2	2009-07-28
Efficient memory hierarchy management Grant 7,552,283 - Morrow , et al. June 23, 2	2009-06-23
Apparatus for generating return address predictions for implicit and explicit subroutine calls Grant 7,478,228 - Stempel , et al. January 13, 2	2009-01-13
Methods and Apparatus for Emulating the Branch Prediction Behavior of an Explicit Subroutine Call App 20080288753 - Stempel; Brian Michael ; et al.	2008-11-20
Latency insensitive FIFO signaling protocol Grant 7,454,538 - Dockser , et al. November 18, 2	2008-11-18
Latency Insensitive FIFO Signaling Protocol App 20080281996 - Dockser; Kenneth Alan ; et al.	2008-11-13
Methods and apparatus for predicting unaligned memory access Grant 7,437,537 - Bridges , et al. October 14, 2	2008-10-14
System, Method and Software to Preload Instructions from a Variable-Length Instruction Set with Proper Pre-Decoding App 20080250229 - Stempel; Brian Michael ; et al.	2008-10-09
System, Method And Software To Preload Instructions From An Instruction Set Other Than One Currently Executing App 20080229069 - Sartorius; Thomas Andrew ; et al.	2008-09-18
TLB lock indicator Grant 7,426,626 - Augsburg , et al. September 16, 2	2008-09-16
Two-level interrupt service routine Grant 7,424,563 - Birenbach , et al. September 9, 2	2008-09-09
Power saving methods and apparatus to selectively enable cache bits based on known processor state Grant 7,421,568 - Stempel , et al. September 2, 2	2008-09-02
Method and apparatus to clear semaphore reservation for exclusive access to shared memory Grant 7,421,529 - Speier , et al. September 2, 2	2008-09-02
Pre-decode error handling via branch correction Grant 7,415,638 - Smith , et al. August 19, 2	2008-08-19
Speculative Instruction Issue in a Simultaneously Multithreaded Processor App 20080189521 - Augsburg; Victor Roberts ; et al.	2008-08-07
Address Translation Method and Apparatus App 20080189506 - Kopec; Brian Joseph ; et al.	2008-08-07
Apparatus and Methods to Reduce Castouts in a Multi-Level Cache Hierarchy App 20080183967 - Speier; Thomas Philip ; et al.	2008-07-31
Translation lookaside buffer (TLB) suppression for intra-page program counter relative or absolute address branch instructions Grant 7,406,613 - Dieffenderfer , et al. July 29, 2	2008-07-29
Segmented Pipeline Flushing for Mispredicted Branches App 20080177992 - Smith; Rodney Wayne ; et al.	2008-07-24
Use of Register Renaming System for Forwarding Intermediate Results Between Constituent Instructions of an Expanded Instruction App 20080177987 - McIlvaine; Michael Scott ; et al.	2008-07-24
Handling cache miss in an instruction crossing a cache line boundary Grant 7,404,042 - Stempel , et al. July 22, 2	2008-07-22
Methods and apparatus to insure correct predecode Grant 7,376,815 - Smith , et al. May 20, 2	2008-05-20
System and method for using a working global history register App 20080109644 - Stempel; Brian Michael ; et al.	2008-05-08
Method and system for optimizing translation lookaside buffer entries Grant 7,366,869 - Sartorius , et al. April 29, 2	2008-04-29
Speculative instruction issue in a simultaneously multithreaded processor Grant 7,366,877 - Augsburg , et al. April 29, 2	2008-04-29
Methods and System for Resolving Simultaneous Predicted Branch Instructions App 20080077781 - Smith; Rodney Wayne ; et al.	2008-03-27
Methods and Apparatus for Emulating the Branch Prediction Behavior of an Explicit Subroutine Call App 20080059780 - Stempel; Brian Michael ; et al.	2008-03-06
Debug Circuit Comparing Processor Instruction Set Operating Mode App 20080040587 - Burke; Kevin Charles ; et al.	2008-02-14
Global modified indicator to reduce power consumption on cache miss Grant 7,330,941 - Sartorius , et al. February 12, 2	2008-02-12
Method and Apparatus for Prefetching Non-Sequential Instruction Addresses App 20080034187 - Stempel; Brian Michael ; et al.	2008-02-07
Efficient Interrupt Return Address Save Mechanism App 20080028194 - Sartorius; Thomas Andrew ; et al.	2008-01-31
Sliding-Window, Block-Based Branch Target Address Cache App 20070283134 - Smith; Rodney Wayne ; et al.	2007-12-06
Block-based Branch Target Address Cache App 20070266228 - Smith; Rodney Wayne ; et al.	2007-11-15
System on a chip bus with automatic pipeline stage insertion for timing closure Grant 7,296,175 - Augsburg , et al. November 13, 2	2007-11-13
Virtually-Tagged Instruction Cache with Physically-Tagged Behavior App 20070250666 - Sartorius; Thomas Andrew ; et al.	2007-10-25
Sending thread message generated using DCR command pointed message control block storing message and response memory address in multiprocessor Grant 7,281,118 - Bridges , et al. October 9, 2	2007-10-09
Method and apparatus for efficiently accessing first and second branch history tables to predict branch instructions Grant 7,278,012 - Sartorius , et al. October 2, 2	2007-10-02
Two-level interrupt service routine App 20070204087 - Birenbach; Michael Egnoah ; et al.	2007-08-30
Power saving methods and apparatus to selectively enable comparators in a CAM renaming register file based on known processor state Grant 7,263,577 - Bridges , et al. August 28, 2	2007-08-28
Cache locking without interference from normal allocations App 20070180199 - Augsburg; Victor Roberts ; et al.	2007-08-02
Efficient memory hierarchy management App 20070174553 - Morrow; Michael William ; et al.	2007-07-26
Translation lookaside buffer manipulation App 20070174584 - Kopec; Brian Joseph ; et al.	2007-07-26
Early conditional selection of an operand App 20070174592 - Dieffenderfer; James Norris ; et al.	2007-07-26
Updating multiple levels of translation lookaside buffers (TLBs) field App 20070094476 - Augsburg; Victor Roberts ; et al.	2007-04-26
Method and apparatus to clear semaphore reservation App 20070094430 - Speier; Thomas Philip ; et al.	2007-04-26
Conditional instruction execution via emissary instruction for condition evaluation Grant 7,210,024 - McIlvaine , et al. April 24, 2	2007-04-24
Method and apparatus for managing a return stack Grant 7,203,826 - Smith , et al. April 10, 2	2007-04-10
Method and apparatus for managing cache partitioning App 20070067574 - Stempel; Brian Michael ; et al.	2007-03-22
TLB lock indicator App 20070050594 - Augsburg; Victor Roberts ; et al.	2007-03-01
Method and system for providing an energy efficient register file App 20070038826 - Dieffenderfer; James Norris ; et al.	2007-02-15
System and method for exchanging messages in a multi-processor environment App 20070033303 - Bridges; Jeffrey Todd ; et al.	2007-02-08
Instruction cache having fixed number of variable length instructions App 20070028050 - Bridges; Jeffrey Todd ; et al.	2007-02-01
Preventing multiple translation lookaside buffer accesses for a same page in memory App 20070005933 - Kopec; Brian Joseph ; et al.	2007-01-04
Method and apparatus for managing a link return stack App 20060294346 - Stempel; Brian Michael ; et al.	2006-12-28
System and method of correcting a branch misprediction Grant 7,152,155 - McIlvaine , et al. December 19, 2	2006-12-19
Method and apparatus for managing instruction flushing in a microprocessor's instruction pipeline App 20060282829 - Mcllvaine; Michael Scott ; et al.	2006-12-14
Method and apparatus for predicting branch instructions App 20060277397 - Sartorius; Thomas Andrew ; et al.	2006-12-07
Handling cache miss in an instruction crossing a cache line boundary App 20060265572 - Stempel; Brian Michael ; et al.	2006-11-23
Latency insensitive FIFO signaling protocol App 20060259669 - Dockser; Kenneth Alan ; et al.	2006-11-16
Ensuring orderly forward progress in granting snoop castout requests Grant 7,127,562 - Dieffenderfer , et al. October 24, 2	2006-10-24
System and method wherein conditional instructions unconditionally provide output App 20060236078 - Sartorius; Thomas Andrew ; et al.	2006-10-19
Global modified indicator to reduce power consumption on cache miss App 20060218354 - Sartorius; Thomas Andrew ; et al.	2006-09-28
Enforcing strongly-ordered requests in a weakly-ordered processing system App 20060218358 - Hofmann; Richard Gerard ; et al.	2006-09-28
Branch target address cache storing two or more branch target addresses per index App 20060218385 - Smith; Rodney Wayne ; et al.	2006-09-28
Method and system for optimizing translation lookaside buffer entries App 20060212675 - Sartorius; Thomas Andrew ; et al.	2006-09-21
Power saving methods and apparatus to selectively enable comparators in a CAM renaming register file based on known processor state App 20060206688 - Bridges; Jeffrey Todd ; et al.	2006-09-14
Power saving methods and apparatus to selectively enable cache bits based on known processor state App 20060200686 - Stempel; Brian Michael ; et al.	2006-09-07
Method and apparatus for power reduction utilizing heterogeneously-multi-pipelined processor App 20060200651 - Collopy; Thomas K. ; et al.	2006-09-07
Stop waiting for source operand when conditional instruction will not execute App 20060200654 - Dieffenderfer; James Norris ; et al.	2006-09-07
Forward looking branch target address caching App 20060200655 - Smith; Rodney Wayne ; et al.	2006-09-07
Methods and apparatus to insure correct predecode App 20060195830 - Smith; Rodney Wayne ; et al.	2006-08-31
System and method of correcting a branch misprediction App 20060190707 - McIlvaine; Michael Scott ; et al.	2006-08-24
Method and apparatus for managing a return stack App 20060190711 - Smith; Rodney Wayne ; et al.	2006-08-24
Unaligned memory access prediction App 20060184738 - Bridges; Jeffrey Todd ; et al.	2006-08-17
Conditional instruction execution via emissary instruction for condition evaluation App 20060179288 - McIlvaine; Michael Scott ; et al.	2006-08-10
Power efficient instruction prefetch mechanism App 20060174090 - Sartorius; Thomas Andrew ; et al.	2006-08-03
Fractional-word writable architected register for direct accumulation of misaligned data App 20060174066 - Bridges; Jeffrey Todd ; et al.	2006-08-03
Translation lookaside buffer (TLB) suppression for intra-page program counter relative or absolute address branch instructions App 20060149981 - Dieffenderfer; James Norris ; et al.	2006-07-06
Pre-decode error handling via branch correction App 20060123326 - Smith; Rodney Wayne ; et al.	2006-06-08
Method and apparatus for performing an atomic semaphore operation App 20060090051 - Speier; Thomas Philip ; et al.	2006-04-27
Re-ordering a first request within a FIFO request queue to a different queue position when the first request receives a retry response from the target Grant 7,035,958 - Augsburg , et al. April 25, 2	2006-04-25
Dynamic cache coherency snooper presence with variable snoop latency Grant 6,985,972 - Dieffenderfer , et al. January 10, 2	2006-01-10
Efficiently calculating a branch target address Grant 6,948,053 - Augsburg , et al. September 20, 2	2005-09-20
Method for moving snoop pushes to the front of a request queue Grant 6,907,502 - Augsburg , et al. June 14, 2	2005-06-14
Speculative instruction issue in a simultaneously multithreaded processor App 20050060518 - Augsburg, Victor Roberts ; et al.	2005-03-17
System on a chip bus with automatic pipeline stage insertion for timing closure App 20050055655 - Augsburg, Victor Roberts ; et al.	2005-03-10
System on a chip bus with automatic pipeline stage insertion for timing closure Grant 6,834,378 - Augsburg , et al. December 21, 2	2004-12-21
Ensuring orderly forward progress in granting snoop castout requests App 20040255085 - Dieffenderfer, James Norris ; et al.	2004-12-16
Reducing power in a snooping cache based multiprocessor environment Grant 6,826,656 - Augsburg , et al. November 30, 2	2004-11-30
System and method for tracing program instructions before and after a trace triggering event within a processor Grant 6,826,747 - Augsburg , et al. November 30, 2	2004-11-30
Re-encoding illegal OP codes into a single illegal OP code to accommodate the extra bits associated with pre-decoded instructions Grant 6,816,962 - Augsburg , et al. November 9, 2	2004-11-09
Multiprocessor environment supporting variable-sized coherency transactions Grant 6,807,608 - Augsburg , et al. October 19, 2	2004-10-19
Dynamic cache coherency snooper presence with variable snoop latency App 20040068595 - Dieffenderfer, James Norris ; et al.	2004-04-08
Reordering of requests between an initiator and the request queue of a bus controller App 20040068603 - Augsburg, Victor Roberts ; et al.	2004-04-08
Method for moving snoop pushes to the front of a request queue App 20040068623 - Augsburg, Victor Roberts ; et al.	2004-04-08
System on a chip bus with automatic pipeline stage insertion for timing closure App 20040068707 - Augsburg, Victor Roberts ; et al.	2004-04-08
Efficiently calculating a branch target address App 20030163677 - Augsburg, Victor Roberts ; et al.	2003-08-28
Re-encoding illegal OP codes into a single illegal OP code to accommodate the extra bits associated with pre-decoded instructions App 20030163670 - Augsburg, Victor Roberts ; et al.	2003-08-28
Multiprocessor environment supporting variable-sized coherency transactions App 20030159005 - Augsburg, Victor Roberts ; et al.	2003-08-21
Reducing power in a snooping cache based multiprocessor environment App 20030145174 - Augsburg, Victor Roberts ; et al.	2003-07-31
System and method for tracing program execution within a superscalar processor Grant 6,513,134 - Augsburg , et al. January 28, 2	2003-01-28
Address pipelining for data transfers Grant 6,081,860 - Bridges , et al. June 27, 2	2000-06-27
System and method for tracing program execution within a processor before and after a triggering event Grant 5,996,092 - Augsburg , et al. November 30, 1	1999-11-30
Methods and apparatus for control of speculative memory accesses Grant 5,926,831 - Revilla , et al. July 20, 1	1999-07-20
Methods and architectures for overlapped read and write operations Grant 5,925,118 - Revilla , et al. July 20, 1	1999-07-20
Dynamic control of power management circuitry Grant 5,910,930 - Dieffenderfer , et al. June 8, 1	1999-06-08
Systems and methods for dynamically controlling a bus Grant 5,862,353 - Revilla , et al. January 19, 1	1999-01-19
System and method for program execution tracing within an integrated processor Grant 5,809,293 - Bridges , et al. September 15, 1	1998-09-15
Method and apparatus for processing null terminated character strings Grant 5,724,572 - Dieffenderfer , et al. March 3, 1	1998-03-03