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Patent applications and USPTO patent grants for Sapozhnikov; Mike.The latest application filed is for "high speed traceless interconnect".
Patent | Date |
---|---|
Optimizing design and performance for printed circuit boards Grant 11,425,821 - Koul , et al. August 23, 2 | 2022-08-23 |
High Speed Traceless Interconnect App 20220181807 - Visneski; Jason ;   et al. | 2022-06-09 |
Fiber Weave Skew Assessment For Printed Circuit Boards App 20220128350 - Koul; Amendra ;   et al. | 2022-04-28 |
Fiber Weave Skew Assessment For Printed Circuit Boards App 20220120558 - Koul; Amendra ;   et al. | 2022-04-21 |
Fiber weave skew assessment for printed circuit boards Grant 11,293,752 - Koul , et al. April 5, 2 | 2022-04-05 |
Fiber weave skew assessment for printed circuit boards Grant 11,287,245 - Koul , et al. March 29, 2 | 2022-03-29 |
Optimizing Design And Performance For Printed Circuit Boards App 20210059055 - Koul; Amendra ;   et al. | 2021-02-25 |
Fiber Weave Skew Assessment For Printed Circuit Boards App 20200263977 - Koul; Amendra ;   et al. | 2020-08-20 |
Fiber Weave Skew Assessment For Printed Circuit Boards App 20200263976 - Koul; Amendra ;   et al. | 2020-08-20 |
Removal of channel impairments due to skew and channel asymmetry with a composite filter Grant 10,735,039 - Goergen , et al. | 2020-08-04 |
Fiber weave skew assessment for printed circuit boards Grant 10,684,123 - Koul , et al. | 2020-06-16 |
Measuring effective dielectric constant using via-stub resonance Grant 10,674,598 - Nozadze , et al. | 2020-06-02 |
Network connector assembly Grant 10,431,914 - Curtis , et al. O | 2019-10-01 |
Fiber Weave Skew Assessment For Printed Circuit Boards App 20190219385 - Koul; Amendra ;   et al. | 2019-07-18 |
Network Connector Assembly App 20190036252 - Curtis; George Edward ;   et al. | 2019-01-31 |
Determining Physical Layer Error Signatures of a Communications Link App 20170132055 - Wu; Hui ;   et al. | 2017-05-11 |
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