loadpatents
name:-0.0094988346099854
name:-0.036334037780762
name:-0.029309034347534
Santan; Sonal Patent Filings

Santan; Sonal

Patent Applications and Registrations

Patent applications and USPTO patent grants for Santan; Sonal.The latest application filed is for "high throughput circuit architecture for hardware acceleration".

Company Profile
13.35.7
  • Santan; Sonal - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
High throughput circuit architecture for hardware acceleration
Grant 11,386,034 - Santan , et al. July 12, 2
2022-07-12
High Throughput Circuit Architecture For Hardware Acceleration
App 20220138140 - Santan; Sonal ;   et al.
2022-05-05
Heterogeneous execution pipeline across different processor architectures and FPGA fabric
Grant 11,163,605 - Santan , et al. November 2, 2
2021-11-02
Supporting access to accelerators on a programmable integrated circuit by multiple host processes
Grant 11,086,815 - Santan , et al. August 10, 2
2021-08-10
Enabling integrity and authenticity of design data
Grant 11,042,610 - Neema , et al. June 22, 2
2021-06-22
Unified container for hardware and software binaries
Grant 10,956,241 - Neema , et al. March 23, 2
2021-03-23
Streaming platform flow and architecture for an integrated circuit
Grant 10,924,430 - Thyamagondlu , et al. February 16, 2
2021-02-16
Updating firmware for programmable integrated circuits in computing environments
Grant 10,922,068 - Radjabi , et al. February 16, 2
2021-02-16
Embedded scheduling of hardware resources for hardware acceleration
Grant 10,877,766 - Soe , et al. December 29, 2
2020-12-29
Interface firewall for an integrated circuit of an expansion card
Grant 10,819,680 - Santan , et al. October 27, 2
2020-10-27
Unified address space for multiple hardware accelerators using dedicated low latency links
Grant 10,802,995 - Singh , et al. October 13, 2
2020-10-13
Streaming Platform Flow And Architecture
App 20200153756 - Thyamagondlu; Chandrasekhar S. ;   et al.
2020-05-14
Unified Address Space For Multiple Hardware Accelerators Using Dedicated Low Latency Links
App 20200081850 - Singh; Sarabjeet ;   et al.
2020-03-12
Embedded Scheduling Of Hardware Resources For Hardware Acceleration
App 20190361708 - Soe; Soren T. ;   et al.
2019-11-28
Scheduling hardware resources for offloading functions in a heterogeneous computing system
Grant 10,402,223 - Santan , et al. Sep
2019-09-03
Machine Learning Runtime Library For Neural Network Acceleration
App 20190114533 - Ng; Aaron ;   et al.
2019-04-18
Adaptive compilation and execution for hardware acceleration
Grant 10,216,217 - Santan , et al. Feb
2019-02-26
Parallel Compute Offload To Database Accelerator
App 20180373760 - Verma; Hare K. ;   et al.
2018-12-27
Boot and configuration management for accelerators
Grant 10,031,760 - Santan , et al. July 24, 2
2018-07-24
Hardware acceleration device handoff for using programmable integrated circuits as hardware accelerators
Grant 9,864,828 - Puthana , et al. January 9, 2
2018-01-09
Heterogeneous multiprocessor platform targeting programmable integrated circuits
Grant 9,846,660 - Styles , et al. December 19, 2
2017-12-19
Software development-based compilation flow for hardware implementation
Grant 9,824,173 - An , et al. November 21, 2
2017-11-21
Heterogeneous Multiprocessor Platform Targeting Programmable Integrated Circuits
App 20160132441 - Styles; Henry E. ;   et al.
2016-05-12
Heterogeneous multiprocessor program compilation targeting programmable integrated circuits
Grant 9,218,443 - Styles , et al. December 22, 2
2015-12-22
Compilation and simulation of a circuit design
Grant 9,135,384 - Santan , et al. September 15, 2
2015-09-15
Net sensitivity ranges for detection of simulation events
Grant 9,117,043 - Huang , et al. August 25, 2
2015-08-25
Mixed-language simulation
Grant 8,838,431 - Mihalache , et al. September 16, 2
2014-09-16
Suspending procedures in simulation of a circuit design
Grant 8,751,210 - Santan June 10, 2
2014-06-10
Suspension of procedures in simulation of an HDL specification
Grant 8,560,295 - Santan , et al. October 15, 2
2013-10-15
Compilation and simulation of a circuit design
Grant 8,516,413 - Deshpande , et al. August 20, 2
2013-08-20
Scheduling processes in simulation of a circuit design
Grant 8,495,539 - Mihalache , et al. July 23, 2
2013-07-23
Compilation and simulation of a circuit design
Grant 8,418,095 - Neema , et al. April 9, 2
2013-04-09
Generating a simulation model of a circuit design
Grant 8,327,311 - Neema , et al. December 4, 2
2012-12-04
Dangling reference detection and garbage collection during hardware simulation
Grant 7,403,961 - Deepak , et al. July 22, 2
2008-07-22

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