Sankaran; Sujatha

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sankaran; Sujatha.The latest application filed is for "device and methodology for reducing effective dielectric constant in semiconductor devices".

Company Profile

0.17.18

Sankaran; Sujatha - Wappingers Falls NY
Sankaran; Sujatha - Hopewell Junction NY
Sankaran; Sujatha - New Paltz NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 8,343,868 - Edelstein , et al. January 1, 2	2013-01-01
Capping of copper interconnect lines in integrated circuit devices Grant 8,298,948 - Bonilla , et al. October 30, 2	2012-10-30
Reducing effective dielectric constant in semiconductor devices Grant 8,129,286 - Edelstein , et al. March 6, 2	2012-03-06
Interconnect structure for integrated circuits having improved electromigration characteristics Grant 8,056,039 - Chanda , et al. November 8, 2	2011-11-08
Method of forming an embedded barrier layer for protection from chemical mechanical polishing process Grant 7,968,456 - McLaughlin , et al. June 28, 2	2011-06-28
Electronics structures using a sacrificial multi-layer hardmask scheme Grant 7,947,907 - Colburn , et al. May 24, 2	2011-05-24
Capping of Copper Interconnect Lines in Integrated Circuit Devices App 20110108990 - Bonilla; Griselda ; et al.	2011-05-12
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20110111590 - Edelstein; Daniel C. ; et al.	2011-05-12
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 7,892,940 - Edelstein , et al. February 22, 2	2011-02-22
Reliability of wide interconnects Grant 7,776,737 - Bonilla , et al. August 17, 2	2010-08-17
Structure and method of forming electrically blown metal fuses for integrated circuits Grant 7,737,528 - Bonilla , et al. June 15, 2	2010-06-15
Test structure for determining optimal seed and liner layer thicknesses for dual damascene processing Grant 7,671,362 - Bolom , et al. March 2, 2	2010-03-02
Reliability Of Wide Interconnects App 20100038790 - Bonilla; Griselda ; et al.	2010-02-18
Dry etchback of interconnect contacts Grant 7,645,700 - Standaert , et al. January 12, 2	2010-01-12
Interconnect Structure For Integrated Circuits Having Improved Electromigration Characteristics App 20090294973 - Chanda; Kaushik ; et al.	2009-12-03
Structure And Method Of Forming Electrically Blown Metal Fuses For Integrated Circuits App 20090294901 - Bonilla; Griselda ; et al.	2009-12-03
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 7,592,685 - Edelstein , et al. September 22, 2	2009-09-22
Test Structure For Determining Optimal Seed And Liner Layer Thicknesses For Dual Damascene Processing App 20090146143 - Bolom; Tibor ; et al.	2009-06-11
Interconnect structure and process of making the same Grant 7,488,679 - Standaert , et al. February 10, 2	2009-02-10
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20080254630 - EDELSTEIN; Daniel C. ; et al.	2008-10-16
Electronics Structures Using a Sacrificial Multi-Layer Hardmask Scheme App 20080251284 - Colburn; Matthew Earl ; et al.	2008-10-16
Embedded Barrier For Dielectric Encapsulation App 20080217777 - McLaughlin; Paul S. ; et al.	2008-09-11
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 7,405,147 - Edelstein , et al. July 29, 2	2008-07-29
Embedded barrier for dielectric encapsulation Grant 7,394,154 - McLaughlin , et al. July 1, 2	2008-07-01
Process for preparing electronics structures using a sacrificial multilayer hardmask scheme Grant 7,371,684 - Colburn , et al. May 13, 2	2008-05-13
Dry Etchback Of Interconnect Contacts App 20080088027 - STANDAERT; THEODORUSE ; et al.	2008-04-17
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20080038923 - EDELSTEIN; Daniel C. ; et al.	2008-02-14
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20080038915 - EDELSTEIN; Daniel C. ; et al.	2008-02-14
Interconnect Structure And Process Of Making The Same App 20080026568 - Standaert; Theodorus Eduardus ; et al.	2008-01-31
Dry etchback of interconnect contacts Grant 7,323,410 - Standaert , et al. January 29, 2	2008-01-29
Damascene interconnection having a SiCOH low k layer App 20070232048 - Miyata; Koji ; et al.	2007-10-04
Embedded barrier for dielectric encapsulation App 20070057374 - McLaughlin; Paul S. ; et al.	2007-03-15
Dry Etchback Of Interconnect Contacts App 20070032055 - Standaert; Theodorus E. ; et al.	2007-02-08
Process for preparing electronics structures using a sacrificial multilayer hardmask scheme App 20060258159 - Colburn; Matthew Earl ; et al.	2006-11-16
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20050167838 - Edelstein, Daniel C. ; et al.	2005-08-04

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