| Patent | Date |
|---|
Access Log And Address Translation Log For A Processor
App 20220269620 - SANDER; Benjamin T. ; et al. | 2022-08-25 |
Access log and address translation log for a processor
Grant 11,288,205 - Sander , et al. March 29, 2 | 2022-03-29 |
Shared virtual address space for heterogeneous processors
Grant 11,100,004 - Cheng , et al. August 24, 2 | 2021-08-24 |
Caching policies for processing units on multiple sockets
Grant 10,467,138 - Blinzer , et al. No | 2019-11-05 |
Selective data copying between memory modules
Grant 10,423,354 - Rogers , et al. Sept | 2019-09-24 |
Cache access statistics accumulation for cache line replacement selection
Grant 9,910,788 - Rogers , et al. March 6, 2 | 2018-03-06 |
Caching Policies For Processing Units On Multiple Sockets
App 20170185514 - Blinzer; Paul ; et al. | 2017-06-29 |
Cache Access Statistics Accumulation For Cache Line Replacement Selection
App 20170083455 - Rogers; Philip J. ; et al. | 2017-03-23 |
Selective Data Copying Between Memory Modules
App 20170083240 - Rogers; Philip ; et al. | 2017-03-23 |
Shared Virtual Address Space For Heterogeneous Processors
App 20160378674 - Cheng; Gongxian Jeffrey ; et al. | 2016-12-29 |
Access Log And Address Translation Log For A Processor
App 20160378682 - Sander; Benjamin T. ; et al. | 2016-12-29 |
Automatic source code generation for accelerated function calls
Grant 9,501,269 - Rodgers , et al. November 22, 2 | 2016-11-22 |
Automatic Source Code Generation For Accelerated Function Calls
App 20160092181 - Rodgers; Gregory P. ; et al. | 2016-03-31 |
Store aware prefetching for a datastream
Grant 8,667,225 - Sander , et al. March 4, 2 | 2014-03-04 |
Load Balancing For Heterogeneous Systems
App 20130339978 - Sander; Benjamin T. | 2013-12-19 |
Processor power management and method
Grant 8,195,887 - Hughes , et al. June 5, 2 | 2012-06-05 |
Paired Execution Scheduling Of Dependent Micro-operations
App 20120023314 - Crum; Matthew M. ; et al. | 2012-01-26 |
System and method for scheduling operations using speculative data operands
Grant 7,937,569 - Sander , et al. May 3, 2 | 2011-05-03 |
Store Aware Prefetching For A Datastream
App 20110066811 - Sander; Benjamin T. ; et al. | 2011-03-17 |
Processor Power Management And Method
App 20100185820 - Hughes; William A. ; et al. | 2010-07-22 |
Determination of current stack pointer value using architectural and speculative stack pointer delta values
Grant 7,685,406 - Svec , et al. March 23, 2 | 2010-03-23 |
Techniques for Maintaining a Stack Pointer
App 20080235491 - Svec; Christopher ; et al. | 2008-09-25 |
Instruction Pipeline Monitoring Device And Method Thereof
App 20080141002 - Bhargava; Ravindra N. ; et al. | 2008-06-12 |
Fetch Engine Monitoring Device And Method Thereof
App 20080140993 - Bhargava; Ravindra N. ; et al. | 2008-06-12 |
Execution Engine Monitoring Device And Method Thereof
App 20080141008 - Sander; Benjamin T. ; et al. | 2008-06-12 |
Controlling writes to non-renamed register space in an out-of-order execution microprocessor
Grant 7,373,484 - Radhakrishnan , et al. May 13, 2 | 2008-05-13 |
System and method to prevent in-flight instances of operations from disrupting operation replay within a data-speculative microprocessor
Grant 7,363,470 - Filippo , et al. April 22, 2 | 2008-04-22 |
Apparatus and method for port arbitration in a register file on the basis of functional unit issue slots
Grant 7,315,935 - Alsup , et al. January 1, 2 | 2008-01-01 |
Speculation pointers to identify data-speculative operations in microprocessor
Grant 7,266,673 - Filippo , et al. September 4, 2 | 2007-09-04 |
System and method for validating a memory file that links speculative results of load operations to register values
Grant 7,263,600 - Sander , et al. August 28, 2 | 2007-08-28 |
Method and system for changing the executable status of an operation following a branch misprediction without refetching the operation
Grant 7,197,630 - Alsup , et al. March 27, 2 | 2007-03-27 |
Load store unit with replay mechanism
Grant 7,165,167 - Filippo , et al. January 16, 2 | 2007-01-16 |
System and method for handling exceptional instructions in a trace cache based processor
Grant 7,133,969 - Alsup , et al. November 7, 2 | 2006-11-07 |
Dynamic page conflict prediction for DRAM
Grant 7,133,995 - Isaac , et al. November 7, 2 | 2006-11-07 |
Microprocessor including return prediction unit configured to determine whether a stored return address corresponds to more than one call instruction
Grant 6,973,563 - Sander December 6, 2 | 2005-12-06 |
System and method for validating a memory file that links speculative results of load operations to register values
App 20050247774 - Sander, Benjamin T. ; et al. | 2005-11-10 |
Scheduler for use in a microprocessor that supports data-speculative execution
Grant 6,950,925 - Sander , et al. September 27, 2 | 2005-09-27 |
System and method for handling exceptional instructions in a trace cache based processor
App 20050076180 - Alsup, Mitchell ; et al. | 2005-04-07 |
Load store unit with replay mechanism
App 20040255101 - Filippo, Michael A. ; et al. | 2004-12-16 |
Sectored least-recently-used cache replacement
Grant 6,823,427 - Sander , et al. November 23, 2 | 2004-11-23 |
Speculation pointers to identify data-speculative operations in microprocessor
App 20040221140 - Filippo, Michael A. ; et al. | 2004-11-04 |
System and method to prevent in-flight instances of operations from disrupting operation replay within a data-speculative microprocessor
App 20040221139 - Filippo, Michael A. ; et al. | 2004-11-04 |
Method and system for speculatively invalidating lines in a cache
Grant 6,725,337 - Tan , et al. April 20, 2 | 2004-04-20 |
Stride based prefetcher with confidence counter and dynamic prefetch-ahead mechanism
Grant 6,571,318 - Sander , et al. May 27, 2 | 2003-05-27 |
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