San; Kemal Tamer

Patent Applications and Registrations

Patent applications and USPTO patent grants for San; Kemal Tamer.The latest application filed is for "low-temperature passivation of ferroelectric integrated circuits for enhanced polarization performance".

Company Profile

0.4.10

San; Kemal Tamer - Plano TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Low-Temperature Passivation of Ferroelectric Integrated Circuits for Enhanced Polarization Performance App 20180374861 - Wen; Huang-Chun ; et al.	2018-12-27
Thermal treatment for reducing transistor performance variation in ferroelectric memories Grant 9,548,377 - Udayakumar , et al. January 17, 2	2017-01-17
Low-Temperature Passivation of Ferroelectric Integrated Circuits for Enhanced Polarization Performance App 20160086960 - Wen; Huang-Chun ; et al.	2016-03-24
Thermal Treatment for Reducing Transistor Performance Variation in Ferroelectric Memories App 20150079698 - Udayakumar; Kezhakkedath R. ; et al.	2015-03-19
Method for determining and classifying SRAM bit fail modes suitable for production test implementation and real time feedback Grant 7,324,391 - Loh , et al. January 29, 2	2008-01-29
Method for determining and classifying SRAM bit fail modes suitable for production test implementation and real time feedback App 20060227634 - Loh; Wah Kit ; et al.	2006-10-12
Anti-fuse structure and method of writing and reading in integrated circuits Grant 6,781,887 - Gelsomini , et al. August 24, 2	2004-08-24
Scalable dielectric App 20040063284 - Kaya, Cetin ; et al.	2004-04-01
Anti-fuse structure and method of writing and reading in integrated circuits App 20030207526 - Gelsomini, Tito ; et al.	2003-11-06
Flash memory array integrally formed with another device and method of manufacture therefor App 20030173615 - San, Kemal Tamer ; et al.	2003-09-18
Anti-fuse structure of writing and reading in integrated circuits Grant 6,611,040 - Gelsomini , et al. August 26, 2	2003-08-26
Scalable dielectric App 20020084482 - Kaya, Cetin ; et al.	2002-07-04
Anti-fuse structure and method of writing and reading in integrated circuits App 20010050407 - Gelsomini, Tito ; et al.	2001-12-13
Semiconductor device architectures including UV transmissive nitride layers App 20010046731 - San, Kemal Tamer ; et al.	2001-11-29

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.