loadpatents
name:-0.18543291091919
name:-0.028388977050781
name:-0.0045318603515625
Samavedam; Srikanth Balaji Patent Filings

Samavedam; Srikanth Balaji

Patent Applications and Registrations

Patent applications and USPTO patent grants for Samavedam; Srikanth Balaji.The latest application filed is for "fin-based schottky diode for integrated circuit (ic) products and methods of making such a schottky diode".

Company Profile
3.14.17
  • Samavedam; Srikanth Balaji - Cohoes NY
  • Samavedam; Srikanth Balaji - Fishkill NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor device with doped region adjacent isolation structure in extension region
Grant 11,195,947 - Singh , et al. December 7, 2
2021-12-07
High voltage transistor with fin source/drain regions and trench gate structure
Grant 11,127,818 - Singh , et al. September 21, 2
2021-09-21
Fin-based Schottky Diode For Integrated Circuit (ic) Products And Methods Of Making Such A Schottky Diode
App 20210175370 - Singh; Jagar ;   et al.
2021-06-10
Semiconductor Device With Doped Region Adjacent Isolation Structure In Extension Region
App 20210126126 - Singh; Jagar ;   et al.
2021-04-29
High Voltage Transistor With Fin Source/drain Regions And Trench Gate Structure
App 20210036108 - Singh; Jagar ;   et al.
2021-02-04
Methods Of Forming Short-channel And Long-channel Transistor Devices With Different Heights Of Work Function Metal And The Resul
App 20200273953 - Chu; Tao ;   et al.
2020-08-27
Fin-type field effect transistors with uniform channel lengths and below-channel isolation on bulk semiconductor substrates and methods
Grant 10,644,157 - Frougier , et al.
2020-05-05
Fin-type Field Effect Transistors With Uniform Channel Lengths And Below-channel Isolation On Bulk Semiconductor Substrates And
App 20200044069 - Frougier; Julien ;   et al.
2020-02-06
Transistor device structures with retrograde wells in CMOS applications
Grant 10,483,172 - Vakada , et al. Nov
2019-11-19
Methods of forming source/drain regions on FinFET devices
Grant 10,347,748 - Pandey , et al. July 9, 2
2019-07-09
Novel Approach To Improve Sdb Device Performance
App 20180337033 - PANDEY; Shesh Mani ;   et al.
2018-11-22
Finfet Device And Method Of Manufacturing
App 20180233415 - PANDEY; Shesh Mani ;   et al.
2018-08-16
FinFET device and method of manufacturing
Grant 9,966,313 - Pandey , et al. May 8, 2
2018-05-08
SRAM cell having dual pass gate transistors and method of making the same
Grant 9,935,112 - Zang , et al. April 3, 2
2018-04-03
Transistor Device Structures With Retrograde Wells In Cmos Applications
App 20180047641 - Vakada; Vara G. Reddy ;   et al.
2018-02-15
Finfet Device And Method Of Manufacturing
App 20180040516 - PANDEY; Shesh Mani ;   et al.
2018-02-08
Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structures
Grant 9,852,954 - Vakada , et al. December 26, 2
2017-12-26
Methods Of Forming Source/drain Regions On Finfet Devices
App 20170294522 - Pandey; Shesh Mani ;   et al.
2017-10-12
Integrated circuits with varying gate structures and fabrication methods
Grant 9,576,952 - Joshi , et al. February 21, 2
2017-02-21
Dual three-dimensional and RF semiconductor devices using local SOI
Grant 9,508,743 - Singh , et al. November 29, 2
2016-11-29
Integration method for fabrication of metal gate based multiple threshold voltage devices and circuits
Grant 9,455,201 - Joshi , et al. September 27, 2
2016-09-27
Integrated circuit having multiple threshold voltages
Grant 9,362,180 - Lee , et al. June 7, 2
2016-06-07
Dual Three-dimensional And Rf Semiconductor Devices Using Local Soi
App 20160118414 - SINGH; Jagar ;   et al.
2016-04-28
Methods Of Forming Transistors With Retrograde Wells In Cmos Applications And The Resulting Device Structures
App 20160035630 - Vakada; Vara G. Reddy ;   et al.
2016-02-04
Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structures
Grant 9,209,181 - Vakada , et al. December 8, 2
2015-12-08
Integrated Circuit Having Multiple Threshold Voltages
App 20150243563 - LEE; Bongki ;   et al.
2015-08-27
Integration Method For Fabrication Of Metal Gate Based Multiple Threshold Voltage Devices And Circuits
App 20150243652 - JOSHI; Manoj ;   et al.
2015-08-27
Integrated Circuits With Varying Gate Structures And Fabrication Methods
App 20150243658 - JOSHI; Manoj ;   et al.
2015-08-27
Methods Of Forming Transistors With Retrograde Wells In Cmos Applications And The Resulting Device Structures
App 20140367787 - Vakada; Vara G. Reddy ;   et al.
2014-12-18
Semiconductor embedded resistor generation
Grant 8,012,821 - Ryou , et al. September 6, 2
2011-09-06
Semiconductor Embedded Resistor Generation
App 20100197106 - Ryou; Choongryul ;   et al.
2010-08-05

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