Samavedam; Srikanth B.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Samavedam; Srikanth B..The latest application filed is for "epitaxially forming a set of fins in a semiconductor device".

Company Profile

0.28.31

Samavedam; Srikanth B. - Cohoes NY
Samavedam; Srikanth B. - Austin TX US
Samavedam; Srikanth B. - Fishkill NY
Samavedam; Srikanth B. - Cambridge MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Epitaxially forming a set of fins in a semiconductor device Grant 9,437,740 - van Meer , et al. September 6, 2	2016-09-06
Semiconductor devices with different dielectric thicknesses Grant 9,362,280 - Karve , et al. June 7, 2	2016-06-07
Epitaxially Forming A Set Of Fins In A Semiconductor Device App 20150221770 - van Meer; Johannes M. ; et al.	2015-08-06
Replacement metal gate structure for CMOS device Grant 9,040,404 - Ando , et al. May 26, 2	2015-05-26
Epitaxially forming a set of fins in a semiconductor device Grant 9,034,737 - van Meer , et al. May 19, 2	2015-05-19
Extra Narrow Diffusion Break For 3d Finfet Technologies App 20150050792 - Samavedam; Srikanth B. ; et al.	2015-02-19
Epitaxially Forming A Set Of Fins In A Semiconductor Device App 20150037945 - van Meer; Johannes M. ; et al.	2015-02-05
Replacement Metal Gate Structure For Cmos Device App 20140131808 - Ando; Takashi ; et al.	2014-05-15
Semiconductor Devices With Different Dielectric Thicknesses App 20130249015 - Karve; Gauri V. ; et al.	2013-09-26
Semiconductor devices with different dielectric thicknesses Grant 8,460,996 - Karve , et al. June 11, 2	2013-06-11
Method for fabricating dual-metal gate device Grant 8,178,401 - Gilmer , et al. May 15, 2	2012-05-15
Separate layer formation in a semiconductor device Grant 8,039,339 - Grant , et al. October 18, 2	2011-10-18
CMOS process with optimized PMOS and NMOS transistor devices Grant 8,003,454 - Zhang , et al. August 23, 2	2011-08-23
Process for making a semiconductor device using partial etching Grant 7,910,442 - Taylor, Jr. , et al. March 22, 2	2011-03-22
Method of forming a semiconductor device using stress memorization Grant 7,858,482 - Zhang , et al. December 28, 2	2010-12-28
Process for forming an electronic device including a transistor having a metal gate electrode Grant 7,750,374 - Capasso , et al. July 6, 2	2010-07-06
Optimized Compressive SiGe Channel PMOS Transistor with Engineered Ge Profile and Optimized Silicon Cap Layer App 20100109044 - Tekleab; Daniel G. ; et al.	2010-05-06
Dual gate oxide device integration Grant 7,709,331 - Karve , et al. May 4, 2	2010-05-04
Semiconductor device having a metal carbide gate with an electropositive element and a method of making the same Grant 7,683,439 - Samavedam , et al. March 23, 2	2010-03-23
Method for forming a dual metal gate structure Grant 7,666,730 - Karve , et al. February 23, 2	2010-02-23
Method of making metal gate transistors Grant 7,655,550 - Schaeffer , et al. February 2, 2	2010-02-02
Method for Making Transistors and the Device Thereof App 20090289280 - Zhang; Da ; et al.	2009-11-26
CMOS Process with Optimized PMOS and NMOS Transistor Devices App 20090291540 - Zhang; Da ; et al.	2009-11-26
Modulation of Tantalum-Based Electrode Workfunction App 20090286387 - Gilmer; David C. ; et al.	2009-11-19
Method Of Forming A Semiconductor Device Using Stress Memorization App 20090242944 - Zhang; Da ; et al.	2009-10-01
Semiconductor Devices With Different Dielectric Thicknesses App 20090108296 - Karve; Gauri V. ; et al.	2009-04-30
Dual Gate Oxide Device Integration App 20090068807 - Karve; Gauri V. ; et al.	2009-03-12
Method Of Processing A High-k Dielectric For Cet Scaling App 20090035928 - Hegde; Rama I. ; et al.	2009-02-05
Process For Making A Semiconductor Device Using Partial Etching App 20090029538 - Taylor, JR.; William J. ; et al.	2009-01-29
Method For Forming A Dual Metal Gate Structure App 20090004792 - Karve; Gauri V. ; et al.	2009-01-01
Method of forming a semiconductor device having an interlayer and structure therefor Grant 7,445,976 - Schaeffer , et al. November 4, 2	2008-11-04
Method for forming a dual metal gate structure Grant 7,445,981 - Karve , et al. November 4, 2	2008-11-04
Separate Layer Formation In A Semiconductor Device App 20080261374 - Grant; John M. ; et al.	2008-10-23
Semiconductor Device Having A Metal Carbide Gate With An Electropositive Element And A Method Of Making The Same App 20080224185 - Samavedam; Srikanth B. ; et al.	2008-09-18
Electronic Device Including A Transistor Having A Metal Gate Electrode And A Process For Forming The Electronic Device App 20080111155 - Capasso; Cristiano ; et al.	2008-05-15
A Method Of Making Metal Gate Transistors App 20080001202 - Schaeffer; James K. ; et al.	2008-01-03
Method Of Forming A Semiconductor Device Having An Interlayer And Structure Therefor App 20070272975 - Schaeffer; James K. ; et al.	2007-11-29
Method For Fabricating Dual-metal Gate Device App 20070077698 - Gilmer; David C. ; et al.	2007-04-05
Thermoelectric device structure and apparatus incorporating same App 20060076046 - Ghoshal; Uttam ; et al.	2006-04-13
Method for fabricating dual-metal gate device App 20050282326 - Gilmer, David C. ; et al.	2005-12-22
Method for fabricating dual-metal gate device Grant 6,972,224 - Gilmer , et al. December 6, 2	2005-12-06
Method for forming a thin-film thermoelectric device including a phonon-blocking thermal conductor App 20050150535 - Samavedam, Srikanth B. ; et al.	2005-07-14
Method for forming a monolithic thin-film thermoelectric device including complementary thermoelectric materials App 20050150536 - Ngai, Tat ; et al.	2005-07-14
Monolithic thin-film thermoelectric device including complementary thermoelectric materials App 20050150539 - Ghoshal, Uttam ; et al.	2005-07-14
Blocking layer for silicide uniformity in a semiconductor transistor App 20050136633 - Taylor, William J. JR. ; et al.	2005-06-23
Semiconductor process and integrated circuit having dual metal oxide gate dielectric with single metal gate electrode Grant 6,897,095 - Adetutu , et al. May 24, 2	2005-05-24
Capped dual metal gate transistors for CMOS process and method for making the same Grant 6,894,353 - Samavedam , et al. May 17, 2	2005-05-17
Method of forming an NMOS transistor and structure thereof App 20050095763 - Samavedam, Srikanth B. ; et al.	2005-05-05
Method for fabricating dual-metal gate device App 20040191974 - Gilmer, David C. ; et al.	2004-09-30
Process for forming dual metal gate structures Grant 6,790,719 - Adetutu , et al. September 14, 2	2004-09-14
Capped dual metal gate transistors for CMOS process and method for making the same App 20040023478 - Samavedam, Srikanth B. ; et al.	2004-02-05
Transistor having a high K dielectric and short gate length and method therefor Grant 6,514,808 - Samavedam , et al. February 4, 2	2003-02-04
Transistor with shaped gate electrode and method therefor Grant 6,475,841 - Taylor, Jr. , et al. November 5, 2	2002-11-05
Semiconductor device and a process for forming the same Grant 6,423,632 - Samavedam , et al. July 23, 2	2002-07-23
Memory cell and method for programming thereof Grant 6,320,784 - Muralidhar , et al. November 20, 2	2001-11-20
Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon Grant 6,039,803 - Fitzgerald , et al. March 21, 2	2000-03-21