Sali; Mauro

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sali; Mauro.The latest application filed is for "flash memory device with improved management of protection information".

Company Profile

0.11.5

Sali; Mauro - S. Angelo Lod. IT
Sali; Mauro - Sant'angelo Lodigiano IT
Sali; Mauro - Lodi IT
Sali; Mauro - S. Agelo Lodigiano IT
Sali, Mauro - S. Agelo Lodigiano Lodi
Sali, Mauro - S. Angelo Lodigiano IT
Sali; Mauro - Milan IT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Flash memory device with improved management of protection information Grant 7,761,675 - Mastroianni , et al. July 20, 2	2010-07-20
Flash memory device with improved management of protection information App 20070016735 - Mastroianni; Francesco ; et al.	2007-01-18
Nonvolatile memory device with simultaneous read/write Grant 6,950,337 - Bellini , et al. September 27, 2	2005-09-27
Non-volatile memory with functional capability of simultaneous modification of the content and burst mode read or page mode read Grant 6,912,598 - Bedarida , et al. June 28, 2	2005-06-28
Test structure for the measurement of contact to gate distance in non-volatile memory devices and corresponding test method Grant 6,903,995 - Camerlenghi , et al. June 7, 2	2005-06-07
Non-volatile memory device with burst mode reading and corresponding reading method Grant 6,854,040 - Bartoli , et al. February 8, 2	2005-02-08
Nonvolatile memory device with simultaneous read/write App 20040156235 - Bellini, Andrea ; et al.	2004-08-12
Test structure for the measurement of contact to gate distance in non-volatile memory devices and corresponding test method App 20030235097 - Camerlenghi, Emilio ; et al.	2003-12-25
Method and device for reducing average access time of a non-volatile memory during reading App 20020136069 - Reggiori, Riccardo Riva ; et al.	2002-09-26
Architecture for handling internal voltages in a non-volatile memory, particularly in a single-voltage supply type of dual-work flash memory Grant 6,385,107 - Bedarida , et al. May 7, 2	2002-05-07
Non-volatile memory with a charge pump with regulated voltage App 20020018390 - Confalonieri, Emanuele ; et al.	2002-02-14
Row decoding circuit for a semiconductor non-volatile electrically programmable memory and corresponding method Grant 6,320,792 - Caser , et al. November 20, 2	2001-11-20
Row decoding circuit for a semiconductor non-volatile electrically programmable memory and corresponding method Grant 6,137,725 - Caser , et al. October 24, 2	2000-10-24
Method for setting the threshold voltage of a reference memory cell Grant 5,784,314 - Sali , et al. July 21, 1	1998-07-21
Parallel programming method of memory words and corresponding circuit Grant 5,781,474 - Sali , et al. July 14, 1	1998-07-14
Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices Grant 5,659,502 - Sali , et al. August 19, 1	1997-08-19

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.