loadpatents
Patent applications and USPTO patent grants for Sakuta; Toshiyuki.The latest application filed is for "semiconductor device".
Patent | Date |
---|---|
Semiconductor device Grant 7,199,472 - Minami , et al. April 3, 2 | 2007-04-03 |
Semiconductor integrated-circuit device and method to speed-up CMOS circuit Grant 7,005,906 - Miyamoto , et al. February 28, 2 | 2006-02-28 |
Semiconductor device App 20050051898 - Minami, Toshiaki ;   et al. | 2005-03-10 |
Semiconductor integrated-circuit device and method to speed-up CMOS circuit App 20040223401 - Miyamoto, Nao ;   et al. | 2004-11-11 |
Semiconductor device Grant 6,809,419 - Minami , et al. October 26, 2 | 2004-10-26 |
Low power multiplier Grant 6,721,774 - Lee , et al. April 13, 2 | 2004-04-13 |
Semiconductor device App 20040056355 - Minami, Toshiaki ;   et al. | 2004-03-25 |
Remote configuration access for integrated circuit devices Grant 6,553,439 - Greger , et al. April 22, 2 | 2003-04-22 |
Sealed stacked arrangement of semiconductor devices Grant RE37,539 - Oguchi , et al. February 5, 2 | 2002-02-05 |
Sealed stacked arrangement of semiconductor devices Grant 5,701,031 - Oguchi , et al. December 23, 1 | 1997-12-23 |
Voltage generating circuit in semiconductor integrated circuit Grant 5,633,825 - Sakuta , et al. May 27, 1 | 1997-05-27 |
Voltage generating circuit Grant 5,534,817 - Suzuki , et al. July 9, 1 | 1996-07-09 |
Voltage generating circuit in semiconductor integrated circuit Grant 5,528,538 - Sakuta , et al. June 18, 1 | 1996-06-18 |
Semiconductor memory device having a self-refreshing control circuit Grant 5,453,959 - Sakuta , et al. September 26, 1 | 1995-09-26 |
Special mode control method for dynamic random access memory Grant 5,410,507 - Tazunoki , et al. April 25, 1 | 1995-04-25 |
Semiconductor integrated circuit device Grant 5,394,008 - Ito , et al. February 28, 1 | 1995-02-28 |
Multi-chip semiconductor package Grant 5,332,922 - Oguchi , et al. July 26, 1 | 1994-07-26 |
Semiconductor integrated circuit device having a plurality of memory blocks and a lead on chip (LOC) arrangement Grant 5,208,782 - Sakuta , et al. May 4, 1 | 1993-05-04 |
Wafer scale of full wafer memory system, packaging method thereof, and wafer processing method employed therein Grant 5,191,224 - Tazunoki , et al. March 2, 1 | 1993-03-02 |
Semiconductor device Grant 5,184,208 - Sakuta , et al. February 2, 1 | 1993-02-02 |
Semiconductor memory device Grant 4,991,139 - Takahashi , et al. February 5, 1 | 1991-02-05 |
Resin-encapsulated semiconductor device Grant 4,951,122 - Tsubosaki , et al. August 21, 1 | 1990-08-21 |
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