loadpatents
name:-0.12972593307495
name:-0.14908409118652
name:-0.022205114364624
SAKUI; Koji Patent Filings

SAKUI; Koji

Patent Applications and Registrations

Patent applications and USPTO patent grants for SAKUI; Koji.The latest application filed is for "memory device using semiconductor element and method for manufacturing the same".

Company Profile
29.172.138
  • SAKUI; Koji - Tokyo JP
  • Sakui; Koji - Wako JP
  • Sakui; Koji - Setagayaku JP
  • Sakui; Koji - Wako-shi JP
  • Sakui; Koji - Setagaya-ku JP
  • Sakui; Koji - Minato-ku Tokyo
  • Sakui; Koji - Tokyo-To JP
  • Sakui; Koji - Toshida Minato-ku JP
  • Sakui; Koji - Kawasaki JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory Device Using Semiconductor Element And Method For Manufacturing The Same
App 20220310608 - HARADA; Nozomu ;   et al.
2022-09-29
Semiconductor device and control method thereof
Grant 11,456,028 - Sakui , et al. September 27, 2
2022-09-27
3d Vertical Nand Memory Device Including Multiple Select Lines And Control Lines Having Different Vertical Spacing
App 20220302133 - Sakui; Koji
2022-09-22
Semiconductor device
Grant 11,437,349 - Sakui , et al. September 6, 2
2022-09-06
Methods and apparatuses with vertical strings of memory cells and support circuitry
Grant 11,430,798 - Hasegawa , et al. August 30, 2
2022-08-30
Semiconductor device comprising memory semiconductor chip in which memory cell is laminated on semiconductor substrate
Grant 11,404,396 - Sakui , et al. August 2, 2
2022-08-02
Methods and apparatuses including a string of memory cells having a first select transistor coupled to a second select transistor
Grant 11,386,958 - Sakui July 12, 2
2022-07-12
Memory Device Including Semiconductor Element
App 20220208254 - SAKUI; Koji ;   et al.
2022-06-30
Apparatuses and methods using negative voltages in part of memory write, read, and erase operations
Grant 11,367,486 - Sakui June 21, 2
2022-06-21
Sequential memory operation without deactivating access line signals
Grant 11,355,166 - Sakui , et al. June 7, 2
2022-06-07
Semiconductor apparatus including penetration electrodes connecting laminated semiconductor chips
Grant 11,309,290 - Sakui , et al. April 19, 2
2022-04-19
Semiconductor apparatus
Grant 11,302,379 - Sakui , et al. April 12, 2
2022-04-12
3D vertical NAND memory device including multiple select lines and control lines having different vertical spacing
Grant 11,296,097 - Sakui April 5, 2
2022-04-05
Sequential Write And Sequential Write Verify In Memory Device
App 20210280253 - Sakui; Koji
2021-09-09
Semiconductor Device And Control Method Thereof
App 20210280234 - Sakui; Koji ;   et al.
2021-09-09
Methods And Apparatuses With Vertical Strings Of Memory Cells And Support Circuitry
App 20210265370 - Hasegawa; Takehiro ;   et al.
2021-08-26
Sequential Memory Operation Without Deactivating Access Line Signals
App 20210257008 - Sakui; Koji ;   et al.
2021-08-19
3d Vertical Nand Memory Device Including Multiple Select Lines And Control Lines Having Different Vertical Spacing
App 20210233917 - Sakui; Koji
2021-07-29
Vertical NAND string multiple data line memory
Grant 11,075,163 - Sakui , et al. July 27, 2
2021-07-27
Semiconductor Device
App 20210225810 - Sakui; Koji ;   et al.
2021-07-22
Semiconductor Device
App 20210225427 - Sakui; Koji ;   et al.
2021-07-22
Sequential write and sequential write verify in memory device
Grant 11,017,859 - Sakui May 25, 2
2021-05-25
Apparatus For Establishing A Negative Body Potential In A Memory Cell
App 20210134373 - Sakui; Koji ;   et al.
2021-05-06
Semiconductor Apparatus
App 20210118863 - Sakui; Koji ;   et al.
2021-04-22
3D NAND memory Z-decoder
Grant 10,978,155 - Sakui April 13, 2
2021-04-13
Semiconductor Apparatus
App 20210104272 - Sakui; Koji ;   et al.
2021-04-08
Semiconductor Apparatus
App 20210104497 - Sakui; Koji ;   et al.
2021-04-08
Methods And Apparatuses Including A String Of Memory Cells Having A First Select Transistor Coupled To A Second Select Transistor
App 20210057029 - Sakui; Koji
2021-02-25
Sequential memory operation without deactivating access line signals
Grant 10,923,163 - Sakui , et al. February 16, 2
2021-02-16
Apparatus and methods including establishing a negative body potential in a memory cell
Grant 10,916,313 - Sakui , et al. February 9, 2
2021-02-09
3D vertical NAND memory device including multiple select lines and control lines having different vertical spacing
Grant 10,916,553 - Sakui February 9, 2
2021-02-09
Methods and apparatuses with vertical strings of memory cells and support circuitry
Grant 10,910,389 - Hasegawa , et al. February 2, 2
2021-02-02
Apparatuses and methods to control body potential in 3D non-volatile memory operations
Grant 10,796,778 - Zhao , et al. October 6, 2
2020-10-06
Semiconductor Device
App 20200303009 - Sakui; Koji ;   et al.
2020-09-24
Methods and apparatuses including a string of memory cells having a first select transistor coupled to a second select transistor
Grant 10,762,964 - Sakui Sep
2020-09-01
Apparatuses And Methods To Control Body Potential In 3d Non-volatile Memory Operations
App 20200234781 - Zhao; Han ;   et al.
2020-07-23
3d Nand Memory Z-decoder
App 20200160913 - Sakui; Koji
2020-05-21
Partial Block Memory Operations
App 20200152271 - Sakui; Koji ;   et al.
2020-05-14
Apparatus And Methods Including Establishing A Negative Body Potential In A Memory Cell
App 20200143894 - Sakui; Koji ;   et al.
2020-05-07
Shielded vertically stacked data line architecture for memory
Grant 10,643,714 - Sakui
2020-05-05
3d Vertical Nand Memory Device Including Multiple Select Lines And Control Lines Having Different Vertical Spacing
App 20200066736 - Sakui; Koji
2020-02-27
Sequential Memory Operation Without Deactivating Access Line Signals
App 20200066311 - Sakui; Koji ;   et al.
2020-02-27
Partial block memory operations
Grant 10,541,029 - Feeley , et al. Ja
2020-01-21
Sequential Write And Sequential Write Verify In Memory Device
App 20200020400 - Sakui; Koji
2020-01-16
Methods And Apparatuses Including A String Of Memory Cells Having A First Select Transistor Coupled To A Second Select Transisto
App 20200020399 - Sakui; Koji
2020-01-16
Multi-deck Memory Device With Access Line And Data Line Segregation Between Decks And Method Of Operation Thereof
App 20200013465 - Sakui; Koji
2020-01-09
3D NAND memory Z-decoder
Grant 10,510,414 - Sakui Dec
2019-12-17
Sequential memory operation without deactivating access line signals
Grant 10,497,406 - Sakui , et al. De
2019-12-03
Apparatuses and methods to control body potential in 3D non-volatile memory operations
Grant 10,490,292 - Zhao , et al. Nov
2019-11-26
Methods And Apparatuses With Vertical Strings Of Memory Cells And Support Circuitry
App 20190341394 - Hasegawa; Takehiro ;   et al.
2019-11-07
Memory device including multiple select lines and control lines having different vertical spacing
Grant 10,468,423 - Sakui No
2019-11-05
Apparatus and methods including establishing a negative body potential in a memory cell
Grant 10,453,538 - Sakui , et al. Oc
2019-10-22
Shielded Vertically Stacked Data Line Architecture For Memory
App 20190279722 - Sakui; Koji
2019-09-12
Reduced voltage nonvolatile flash memory
Grant 10,381,091 - Sakui A
2019-08-13
Sequential write and sequential write verify in memory device
Grant 10,360,980 - Sakui
2019-07-23
Multi-deck memory device with access line and data line segregation between decks and method of operation thereof
Grant 10,354,730 - Sakui July 16, 2
2019-07-16
Methods and apparatuses including a string of memory cells having a first select transistor coupled to a second select transistor
Grant 10,340,009 - Sakui
2019-07-02
Methods and apparatuses with vertical strings of memory cells and support circuitry
Grant 10,319,729 - Hasegawa , et al.
2019-06-11
Apparatuses And Methods To Control Body Potential In 3d Non-volatile Memory Operations
App 20190147966 - Zhao; Han ;   et al.
2019-05-16
Apparatuses And Methods Using Negative Voltages In Part Of Memory Write, Read, And Erase Operations
App 20190130976 - Sakui; Koji
2019-05-02
Shielded vertically stacked data line architecture for memory
Grant 10,242,746 - Sakui
2019-03-26
Memory Device Including Current Generator Plate
App 20190019540 - Sakui; Koji
2019-01-17
Methods And Apparatuses Including A String Of Memory Cells Having A First Select Transistor Coupled To A Second Select Transistor
App 20190019556 - Sakui; Koji
2019-01-17
Sequential Write And Sequential Write Verify In Memory Device
App 20190019557 - Sakui; Koji
2019-01-17
Memory device including current generator plate
Grant 10,181,341 - Sakui Ja
2019-01-15
Apparatuses and methods to control body potential in 3D non-volatile memory operations
Grant 10,170,196 - Zhao , et al. J
2019-01-01
Apparatuses and methods using negative voltages in part of memory write read, and erase operations
Grant 10,170,187 - Sakui J
2019-01-01
Multi-deck Memory Device With Access Line And Data Line Segregation Between Decks And Method Of Operation Thereof
App 20180366198 - Sakui; Koji
2018-12-20
3d Nand Memory Z-decoder
App 20180358096 - Sakui; Koji
2018-12-13
Memories including multiple arrays of non-volatile memory cells selectively connected to sense circuitry using different numbers of data lines
Grant 10,141,056 - Sakui , et al. Nov
2018-11-27
Apparatus And Methods Including Establishing A Negative Body Potential In A Memory Cell
App 20180322930 - Sakui; Koji ;   et al.
2018-11-08
Memory Device Including Multiple Select Lines And Control Lines Having Different Vertical Spacing
App 20180322045 - Sakui; Koji
2018-11-08
Reduced Voltage Nonvolatile Flash Memory
App 20180294037 - Sakui; Koji
2018-10-11
Memories Including Multiple Arrays Of Non-volatile Memory Cells Selectively Connected To Sense Circuitry Using Different Numbers Of Data Lines
App 20180286482 - Sakui; Koji ;   et al.
2018-10-04
Sequential write and sequential write verify in memory device
Grant 10,090,052 - Sakui October 2, 2
2018-10-02
Apparatus, systems, and methods to operate a memory
Grant 10,090,053 - Sakui , et al. October 2, 2
2018-10-02
Memory device including current generator plate
Grant 10,090,024 - Sakui October 2, 2
2018-10-02
Reduced voltage nonvolatile flash memory
Grant 10,079,065 - Sakui September 18, 2
2018-09-18
3D NAND memory Z-decoder
Grant 10,074,431 - Sakui September 11, 2
2018-09-11
Multi-deck memory device with access line and data line segregation between decks and method of operation thereof
Grant 10,074,430 - Sakui September 11, 2
2018-09-11
Apparatus, Systems, And Methods To Operate A Memory
App 20180233200 - Sakui; Koji ;   et al.
2018-08-16
Methods including establishing a negative body potential in a memory cell
Grant 10,049,750 - Sakui , et al. August 14, 2
2018-08-14
3D vertical NAND memory device including multiple select lines and control lines having different vertical spacing
Grant 10,042,755 - Sakui August 7, 2
2018-08-07
Methods and apparatuses including a string of memory cells having a first select transistor coupled to a second select transistor
Grant 10,020,056 - Sakui July 10, 2
2018-07-10
Methods for backup sequence using three transistor memory cell devices
Grant 10,014,053 - Sakui , et al. July 3, 2
2018-07-03
Sequential Write And Sequential Write Verify In Memory Device
App 20180137917 - Sakui; Koji
2018-05-17
Apparatus And Methods Including Establishing A Negative Body Potential In A Memory Cell
App 20180137922 - Sakui; Koji ;   et al.
2018-05-17
Apparatus, systems, and methods to operate a memory
Grant 9,972,391 - Sakui , et al. May 15, 2
2018-05-15
Shielded Vertically Stacked Data Line Architecture For Memory
App 20180122482 - Sakui; Koji
2018-05-03
Apparatuses And Methods To Control Body Potential In 3d Non-volatile Memory Operations
App 20180114581 - Zhao; Han ;   et al.
2018-04-26
Memory Device Including Current Generator Plate
App 20180108385 - Sakui; Koji
2018-04-19
Methods and apparatuses having strings of memory cells and select gates with double gates
Grant 9,934,868 - Sakui April 3, 2
2018-04-03
3d Vertical Nand Memory Device Including Multiple Select Lines And Control Lines Having Different Vertical Spacing
App 20180090208 - Sakui; Koji
2018-03-29
Multi-deck Memory Device And Operations
App 20180040377 - Sakui; Koji
2018-02-08
Apparatuses and methods to control body potential in 3D non-volatile memory operations
Grant 9,881,686 - Zhao , et al. January 30, 2
2018-01-30
Sequential write and sequential write verify in memory device
Grant 9,881,674 - Sakui January 30, 2
2018-01-30
Memory Device Including Current Generator Plate
App 20180012634 - Sakui; Koji
2018-01-11
Memory device including current generator plate
Grant 9,865,311 - Sakui January 9, 2
2018-01-09
Methods For Backup Sequence Using Three Transistor Memory Cell Devices
App 20170345501 - Sakui; Koji ;   et al.
2017-11-30
3d Nand Memory Z-decoder
App 20170330626 - Sakui; Koji
2017-11-16
Memory with three transistor memory cell device
Grant 9,767,904 - Sakui , et al. September 19, 2
2017-09-19
Shielded vertically stacked data line architecture for memory
Grant 9,734,915 - Sakui August 15, 2
2017-08-15
Methods And Apparatuses Including A String Of Memory Cells Having A First Select Transistor Coupled To A Second Select Transistor
App 20170178730 - Sakui; Koji
2017-06-22
3D NAND memory Z-decoder
Grant 9,679,650 - Sakui June 13, 2
2017-06-13
Apparatuses And Methods To Control Body Potential In Memory Operations
App 20170110198 - Zhao; Han ;   et al.
2017-04-20
Methods And Apparatuses Having Strings Of Memory Cells And Select Gates With Double Gates
App 20170076808 - Sakui; Koji
2017-03-16
Methods and apparatuses including a string of memory cells having a first select transistor coupled to a second select transistor
Grant 9,583,154 - Sakui February 28, 2
2017-02-28
Memory cell profiles
Grant 9,553,103 - Sakui January 24, 2
2017-01-24
Apparatuses and methods to control body potential in memory operations
Grant 9,536,618 - Zhao , et al. January 3, 2
2017-01-03
Methods and apparatuses having strings of memory cells and select gates with double gates
Grant 9,508,735 - Sakui November 29, 2
2016-11-29
Reduced Voltage Nonvolatile Flash Memory
App 20160329102 - Sakui; Koji
2016-11-10
Local self-boost using a plurality of cut-off cells on a single side of a string of memory cells
Grant 9,472,287 - Sakui , et al. October 18, 2
2016-10-18
Reduced voltage nonvolatile flash memory
Grant 9,424,938 - Sakui August 23, 2
2016-08-23
Methods And Apparatuses Including A String Of Memory Cells Having A First Select Transistor Coupled To A Second Select Transistor
App 20160232947 - Sakui; Koji
2016-08-11
Memory arrays with a memory cell adjacent to a smaller size of a pillar having a greater channel length than a memory cell adjacent to a larger size of the pillar and methods
Grant 9,391,082 - Sakui , et al. July 12, 2
2016-07-12
Apparatus, Systems, And Methods To Operate A Memory
App 20160180934 - Sakui; Koji ;   et al.
2016-06-23
Sensing memory cells coupled to different access lines in different blocks of memory cells
Grant 9,373,404 - Sakui June 21, 2
2016-06-21
Sequential Write And Sequential Write Verify In Memory Device
App 20160172041 - Sakui; Koji
2016-06-16
Methods And Apparatuses With Vertical Strings Of Memory Cells And Support Circuitry
App 20160148943 - Hasegawa; Takehiro ;   et al.
2016-05-26
Programming memory cells using smaller step voltages for higher program levels
Grant 9,349,459 - Sakui May 24, 2
2016-05-24
Methods and apparatuses including a string of memory cells having a first select transistor coupled to a second select transistor
Grant 9,318,200 - Sakui April 19, 2
2016-04-19
Devices and methods of programming memory cells
Grant 9,312,023 - Kawai , et al. April 12, 2
2016-04-12
Sequential Memory Operation Without Deactivating Access Line Signals
App 20160086641 - Sakui; Koji ;   et al.
2016-03-24
Sensing data stored in memory
Grant 9,293,213 - Sakui , et al. March 22, 2
2016-03-22
Methods And Apparatuses Including A String Of Memory Cells Having A First Select Transistor Coupled To A Second Select Transistor
App 20160042791 - Sakui; Koji
2016-02-11
Methods and apparatuses with vertical strings of memory cells and support circuitry
Grant 9,252,148 - Hasegawa , et al. February 2, 2
2016-02-02
Shielded Vertically Stacked Data Line Architecture For Memory
App 20160019970 - Sakui; Koji
2016-01-21
Memory Cell Profiles
App 20160013204 - Sakui; Koji
2016-01-14
Sequential memory operation without deactivating access line signals
Grant 9,208,833 - Sakui , et al. December 8, 2
2015-12-08
Multiple Data Line Memory And Methods
App 20150333001 - Sakui; Koji ;   et al.
2015-11-19
Apparatuses and methods to modify pillar potential
Grant 9,171,625 - Sakui , et al. October 27, 2
2015-10-27
Sensing Memory Cells Coupled To Different Access Lines In Different Blocks Of Memory Cells
App 20150294727 - Sakui; Koji
2015-10-15
Apparatuses And Methods To Control Body Potential In Memory Operations
App 20150287472 - Zhao; Han ;   et al.
2015-10-08
Shielded vertically stacked data line architecture for memory
Grant 9,147,493 - Sakui September 29, 2
2015-09-29
Memory Arrays With A Memory Cell Adjacent To A Smaller Size Of A Pillar Having A Greater Channel Length Than A Memory Cell Adjacent To A Larger Size Of The Pillar And Methods
App 20150249092 - Sakui; Koji ;   et al.
2015-09-03
Multiple data line memory and methods
Grant 9,093,152 - Sakui , et al. July 28, 2
2015-07-28
Methods And Apparatuses With Vertical Strings Of Memory Cells And Support Circuitry
App 20150206587 - Hasegawa; Takehiro ;   et al.
2015-07-23
Memory arrays with a memory cell adjacent to a smaller size of a pillar having a greater channel length than a memory cell adjacent to a larger size of the pillar and methods
Grant 9,076,824 - Sakui , et al. July 7, 2
2015-07-07
Sensing memory cells coupled to different access lines in different blocks of memory cells
Grant 9,070,470 - Sakui June 30, 2
2015-06-30
Apparatuses and methods to control body potential in memory operations
Grant 9,064,577 - Zhao , et al. June 23, 2
2015-06-23
Sensing Memory Cells Coupled To Different Access Lines In Different Blocks Of Memory Cells
App 20150162090 - Sakui; Koji
2015-06-11
Inhibiting pillars in 3D memory devices
Grant 9,053,797 - Sakui June 9, 2
2015-06-09
Memory devices with different sized blocks of memory cells and methods
Grant 9,007,831 - Sakui , et al. April 14, 2
2015-04-14
Memory cells having a plurality of control gates and memory cells having a control gate and a shield
Grant 8,987,801 - Sakui March 24, 2
2015-03-24
Sensing Data Stored In Memory
App 20150078099 - Sakui; Koji ;   et al.
2015-03-19
Methods And Apparatuses Having Strings Of Memory Cells And Select Gates With Double Gates
App 20150078089 - Sakui; Koji
2015-03-19
Memory cell profiles
Grant 8,957,495 - Sakui February 17, 2
2015-02-17
Memory apparatus and methods
Grant 8,942,045 - Sakui January 27, 2
2015-01-27
Shielded Vertically Stacked Data Line Architecture For Memory
App 20140369116 - Sakui; Koji
2014-12-18
Local Self-boost Using A Plurality Of Cut-off Cells On A Single Side Of A String Of Memory Cells
App 20140369130 - Sakui; Koji ;   et al.
2014-12-18
Memory With Three Transistor Memory Cell Device
App 20140347932 - Sakui; Koji ;   et al.
2014-11-27
Sensing data stored in memory
Grant 8,897,072 - Sakui , et al. November 25, 2
2014-11-25
Inhibiting Pillars In 3d Memory Devices
App 20140321215 - SAKUI; Koji
2014-10-30
Sequential Memory Operation Without Deactivating Access Line Signals
App 20140313839 - Sakui; Koji ;   et al.
2014-10-23
Programming Memory Cells Using Smaller Step Voltages For Higher Program Levels
App 20140301145 - Sakui; Koji
2014-10-09
Memory Devices With Different Sized Blocks Of Memory Cells And Methods
App 20140254267 - Sakui; Koji ;   et al.
2014-09-11
Local self-boost using a plurality of cut-off cells on a single side of a string of memory cells
Grant 8,830,775 - Sakui , et al. September 9, 2
2014-09-09
Memory with three transistor memory cell device
Grant 8,804,424 - Sakui , et al. August 12, 2
2014-08-12
Apparatuses And Methods To Control Body Potential In Memory Operations
App 20140160851 - Zhao; Han ;   et al.
2014-06-12
Programming memory cells using smaller step voltages for higher program levels
Grant 8,737,131 - Sakui May 27, 2
2014-05-27
Memory Cells Having A Plurality Of Control Gates And Memory Cells Having A Control Gate And A Shield
App 20140138754 - Sakui; Koji
2014-05-22
Memory Arrays With A Memory Cell Adjacent To A Smaller Size Of A Pillar Having A Greater Channel Length Than A Memory Cell Adjacent To A Larger Size Of The Pillar And Methods
App 20140126290 - Sakui; Koji ;   et al.
2014-05-08
Multiple Data Line Memory And Methods
App 20140119117 - Sakui; Koji ;   et al.
2014-05-01
Memory Apparatus And Methods
App 20140104959 - Sakui; Koji
2014-04-17
Sensing Data Stored In Memory
App 20140104951 - Sakui; Koji ;   et al.
2014-04-17
Partial Block Memory Operations
App 20140036590 - Feeley; Peter Sean ;   et al.
2014-02-06
Memory cells having a plurality of control gates and memory cells having a control gate and a shield
Grant 8,637,914 - Sakui January 28, 2
2014-01-28
Devices And Methods Of Programming Memory Cells
App 20140016411 - KAWAI; Koichi ;   et al.
2014-01-16
Memory apparatus and methods
Grant 8,614,918 - Sakui December 24, 2
2013-12-24
Apparatuses And Methods To Modify Pillar Potential
App 20130336070 - Sakui; Koji ;   et al.
2013-12-19
Apparatuses And Methods Including Memory Write, Read, And Erase Operations
App 20130258785 - Sakui; Koji
2013-10-03
Devices and methods of programming memory cells
Grant 8,537,623 - Kawai , et al. September 17, 2
2013-09-17
Local Self-boost Using A Plurality Of Cut-off Cells On A Single Side Of A String Of Memory Cells
App 20130235660 - Sakui; Koji ;   et al.
2013-09-12
Memory Cell Profiles
App 20130207225 - Sakui; Koji
2013-08-15
Memory Cells Having A Plurality Of Control Gates And Memory Cells Having A Control Gate And A Shield
App 20130146960 - Sakui; Koji
2013-06-13
Programming Memory Cells Using Smaller Step Voltages For Higher Program Levels
App 20130135937 - Sakui; Koji
2013-05-30
Memory With Three Transistor Memory Cell Device
App 20130051142 - Sakui; Koji ;   et al.
2013-02-28
Devices And Methods Of Programming Memory Cells
App 20130010537 - Kawai; Koichi ;   et al.
2013-01-10
Reduced Voltage Nonvolatile Flash Memory
App 20120314507 - Sakui; Koji
2012-12-13
Memory Apparatus And Methods
App 20120281476 - Sakui; Koji
2012-11-08
Nonvolatile semiconductor storage device and operation method thereof
Grant 7,701,773 - Nakagawa , et al. April 20, 2
2010-04-20
Nonvolatile semiconductor memory device and writing method thereof
Grant 7,697,334 - Nakajima , et al. April 13, 2
2010-04-13
Nonvolatile memory with active and passive wear leveling
Grant 7,694,066 - Sakui , et al. April 6, 2
2010-04-06
Semiconductor integrated circuit device with a stacked gate including a floating gate and a control gate
Grant 7,672,164 - Hasegawa , et al. March 2, 2
2010-03-02
Multi-level nonvolatile semiconductor memory device capable of discretely controlling a charge storage layer potential based upon accumulated electrons
Grant 7,596,020 - Nakagawa , et al. September 29, 2
2009-09-29
Nonvolatile Semiconductor Storage Device And Operation Method Thereof
App 20090231924 - NAKAGAWA; Michio ;   et al.
2009-09-17
Nonvolatile semiconductor storage device and operation method thereof
Grant 7,545,684 - Nakagawa , et al. June 9, 2
2009-06-09
Semiconductor storage device
Grant 7,542,355 - Kozakai , et al. June 2, 2
2009-06-02
Nonvolatile semiconductor memory
Grant 7,498,630 - Ichige , et al. March 3, 2
2009-03-03
Nonvolatile semiconductor memory
Grant 7,463,540 - Sakui , et al. December 9, 2
2008-12-09
Semiconductor Integrated Circuit Device With A Stacked Gate Including A Floating Gate And A Control Gate
App 20080212373 - HASEGAWA; Takehiro ;   et al.
2008-09-04
Nonvolatile Semiconductor Storage Device and Operation Method Thereof
App 20080192549 - Nakagawa; Michio ;   et al.
2008-08-14
Nonvolatile semiconductor memory
Grant 7,388,783 - Sakui June 17, 2
2008-06-17
Non-volatile semiconductor storage apparatus
Grant 7,362,614 - Sakui , et al. April 22, 2
2008-04-22
Semiconductor storage device
App 20080084742 - Kozakai; Kenji ;   et al.
2008-04-10
Nonvolatile semiconductor memory device and writing method thereof
App 20080055999 - Nakajima; Tsutomu ;   et al.
2008-03-06
Semiconductor integrated circuit device with a stacked gate including a floating gate and a control gate
Grant 7,332,766 - Hasegawa , et al. February 19, 2
2008-02-19
Nonvolatile semiconductor memory
Grant 7,333,369 - Sakui , et al. February 19, 2
2008-02-19
Nonvolatile semiconductor memory
Grant 7,301,809 - Sakui , et al. November 27, 2
2007-11-27
Nonvolatile semiconductor memory device
Grant 7,242,613 - Sakui , et al. July 10, 2
2007-07-10
Nonvolatile Semiconductor Memory
App 20070133282 - Sakui; Koji ;   et al.
2007-06-14
Nonvolatile Semiconductor Memory
App 20070133283 - Sakui; Koji ;   et al.
2007-06-14
Nonvolatile Semiconductor Memory
App 20070127292 - Sakui; Koji ;   et al.
2007-06-07
Memory system
App 20070103992 - Sakui; Koji ;   et al.
2007-05-10
Non-volatile semiconductor storage apparatus
App 20070086246 - Sakui; Koji ;   et al.
2007-04-19
Nonvolatile Semiconductor Memory, Fabrication Method For The Same, Semiconductor Integrated Circuits And Systems
App 20070070708 - ICHIGE; Masayuki ;   et al.
2007-03-29
Nonvolatile Semiconductor Memory Device And Method Of Operating The Same
App 20070035996 - NAKAGAWA; Michio ;   et al.
2007-02-15
Nonvolatile semiconductor memory
Grant 7,173,850 - Sakui , et al. February 6, 2
2007-02-06
Fabrication method of a nonvolatile semiconductor memory
Grant 7,141,474 - Ichige , et al. November 28, 2
2006-11-28
Nonvolatile semiconductor memory
App 20060245263 - Sakui; Koji
2006-11-02
Nonvolatile semiconductor memory and method of manufacturing the same
Grant 7,115,474 - Sakui , et al. October 3, 2
2006-10-03
Nonvolatile semiconductor memory
Grant 7,099,200 - Sakui August 29, 2
2006-08-29
Semiconductor memory device and memory system
Grant 7,061,786 - Sakui June 13, 2
2006-06-13
Nonvolatile semiconductor memory having a control gate driver transistor whose gate insulator thickness is greater than that of a select gate driver transistor
Grant 7,031,195 - Sato , et al. April 18, 2
2006-04-18
Nonvolatile semiconductor memory device
App 20060050559 - Sakui; Koji ;   et al.
2006-03-09
Semiconductor integrated circuit device with a stacked gate including a floating gate and a control gate
App 20050218460 - Hasegawa, Takehiro ;   et al.
2005-10-06
Semiconductor memory device and memory system
App 20050128808 - Sakui, Koji
2005-06-16
Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems
App 20050099847 - Ichige, Masayuki ;   et al.
2005-05-12
Nonvolatile semiconductor memory
App 20050094431 - Sato, Atsuhiro ;   et al.
2005-05-05
Nonvolatile semiconductor memory
App 20050041476 - Sakui, Koji ;   et al.
2005-02-24
Semiconductor memory device and memory system
Grant 6,859,379 - Sakui February 22, 2
2005-02-22
Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems
Grant 6,845,042 - Ichige , et al. January 18, 2
2005-01-18
Nonvolatile semiconductor memory
App 20040264246 - Sakui, Koji ;   et al.
2004-12-30
Nonvolatile semiconductor memory
App 20040240273 - Sakui, Koji
2004-12-02
Nonvolatile semiconductor memory and method of manufacturing the same
App 20040232472 - Sakui, Koji ;   et al.
2004-11-25
Nonvolatile semiconductor memory
Grant 6,801,458 - Sakui , et al. October 5, 2
2004-10-05
Semiconductor memory device and memory system
App 20040159877 - Sakui, Koji
2004-08-19
Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems
App 20040152262 - Ichige, Masayuki ;   et al.
2004-08-05
Nonvolatile semiconductor memory having control gate with top flat surface covering storage layers of two adjacent transistors
Grant 6,762,955 - Sakui , et al. July 13, 2
2004-07-13
Semiconductor memory device and memory system
Grant 6,741,486 - Sakui May 25, 2
2004-05-25
Stacked type semiconductor device
Grant 6,717,251 - Matsuo , et al. April 6, 2
2004-04-06
Nonvolatile semiconductor memory
App 20040032788 - Sakui, Koji ;   et al.
2004-02-19
Nonvolatile semiconductor memory
Grant 6,657,892 - Sakui , et al. December 2, 2
2003-12-02
Semiconductor memory device and memory system
App 20030210569 - Sakui, Koji
2003-11-13
Nonvolatile semiconductor memory and method of manufacturing the same
App 20030206443 - Sakui, Koji ;   et al.
2003-11-06
Multichip semiconductor device and memory card
Grant 6,624,506 - Sasaki , et al. September 23, 2
2003-09-23
Semiconductor memory device and method of operating the same
Grant 6,618,292 - Sakui September 9, 2
2003-09-09
Semiconductor memory device and memory system
Grant 6,594,169 - Sakui July 15, 2
2003-07-15
Nonvolatile semiconductor memory and method of manufacturing the same
Grant 6,577,533 - Sakui , et al. June 10, 2
2003-06-10
Nonvolatile semiconductor memory
App 20030048661 - Sakui, Koji ;   et al.
2003-03-13
Non-volatile semiconductor memory device and data erase controlling method for use therein
Grant 6,512,702 - Yamamura , et al. January 28, 2
2003-01-28
Nonvolatile semiconductor memory
Grant 6,512,703 - Sakui , et al. January 28, 2
2003-01-28
Semiconductor memory device having memory cells each having a conductive body of booster plate and a method for manufacturing the same
Grant 6,455,889 - Sakui September 24, 2
2002-09-24
Semiconductor memory device and memory system
App 20020114178 - Sakui, Koji
2002-08-22
Semiconductor memory having transistors connected in series
Grant 6,411,548 - Sakui , et al. June 25, 2
2002-06-25
Semiconductor memory device and method of operating the same
App 20020057600 - Sakui, Koji
2002-05-16
Nonvolatile semiconductor memory
Grant 6,370,081 - Sakui , et al. April 9, 2
2002-04-09
Stacked type semiconductor device
App 20020036338 - Matsuo, Mie ;   et al.
2002-03-28
Nonvolatile semiconductor memory device
App 20020034100 - Sakui, Koji ;   et al.
2002-03-21
Nonvolatile semiconductor memory
App 20020021587 - Sakui, Koji ;   et al.
2002-02-21
Multichip semiconductor device and memory card
App 20010045645 - Sasaki, Keiichi ;   et al.
2001-11-29
Nonvolatile semiconductor memory and method of manufacturing the same
App 20010038118 - Sakui, Koji ;   et al.
2001-11-08
Nonvolatile semiconductor memory
Grant 6,307,807 - Sakui , et al. October 23, 2
2001-10-23
Non-volatile semiconductor memory device
Grant 6,295,227 - Sakui , et al. September 25, 2
2001-09-25
Non-volatile semiconductor memory device with block erase function
Grant 6,240,022 - Sakui , et al. May 29, 2
2001-05-29
Multichip semiconductor device and memory card
Grant 6,239,495 - Sakui , et al. May 29, 2
2001-05-29
Semiconductor memory device having memory cells each having a conductive body of booster plate and a method for manufacturing the same
App 20010001491 - Sakui, Koji
2001-05-24
Non-volatile semiconductor memory device
Grant 6,107,658 - Itoh , et al. August 22, 2
2000-08-22
Nonvolatile semiconductor memory device whose addresses are selected in a multiple access
Grant 6,097,666 - Sakui , et al. August 1, 2
2000-08-01
Semiconductor memory device
Grant 6,049,494 - Sakui , et al. April 11, 2
2000-04-11
Nonvolatile semiconductor memory device
Grant 6,046,940 - Takeuchi , et al. April 4, 2
2000-04-04
Semiconductor memory device and method of programming the same
Grant 6,031,760 - Sakui , et al. February 29, 2
2000-02-29
Nonvolatile semiconductor memory device
Grant 6,031,764 - Imamiya , et al. February 29, 2
2000-02-29
Non-volatile semiconductor memory device
Grant 6,011,287 - Itoh , et al. January 4, 2
2000-01-04
Delay circuit, oscillation circuit and semiconductor memory device
Grant 5,969,557 - Tanzawa , et al. October 19, 1
1999-10-19
Multi-level non-volatile semiconductor memory device having improved multi-level data storing circuits
Grant 5,847,992 - Tanaka , et al. December 8, 1
1998-12-08
Non-volatile semiconductor memory device with block erase function
Grant 5,818,756 - Sakui , et al. October 6, 1
1998-10-06
Sense amplifier for use in an EEPROM
Grant 5,740,112 - Tanaka , et al. April 14, 1
1998-04-14
Nonvolatile semiconductor memory device
Grant 5,680,347 - Takeuchi , et al. October 21, 1
1997-10-21
Delay circuit, oscillation circuit and semiconductor memory device
Grant 5,627,488 - Tanzawa , et al. May 6, 1
1997-05-06
Semiconductor memory device
Grant 5,615,163 - Sakui , et al. March 25, 1
1997-03-25
Semiconductor memory device
Grant 5,523,980 - Sakui , et al. June 4, 1
1996-06-04
Semiconductor memory device
Grant 5,517,457 - Sakui , et al. May 14, 1
1996-05-14
Nonvolatile semiconductor memory apparatus
Grant 5,477,495 - Tanaka , et al. December 19, 1
1995-12-19
Non-volatile semiconductor memory device
Grant 5,453,955 - Sakui , et al. September 26, 1
1995-09-26
Semiconductor memory device using ferroelectric capacitor and having only one sense amplifier selected
Grant 5,400,275 - Abe , et al. March 21, 1
1995-03-21
Electrically erasable programmable read-only memory with write/verify controller
Grant 5,379,256 - Tanaka , et al. January 3, 1
1995-01-03
Semiconductor vertical MOSFET inverter circuit
Grant 5,311,050 - Nitayama , et al. May 10, 1
1994-05-10
Memory having ferroelectric capacitors polarized in nonvolatile mode
Grant 5,297,077 - Imai , et al. March 22, 1
1994-03-22
Semiconductor memory including address multiplexing circuitry for changing the order of supplying row and column addresses between read and write cycles
Grant 5,173,878 - Sakui , et al. December 22, 1
1992-12-22
Ferroelectric capacitor and a semiconductor device having the same
Grant 5,155,573 - Abe , et al. October 13, 1
1992-10-13
BiCMOS circuitry having a combination CMOS gate and a bipolar transistor
Grant 5,077,492 - Fuse , et al. December 31, 1
1991-12-31
Semiconductor memory device
Grant 5,038,191 - Hasegawa , et al. August 6, 1
1991-08-06
Semiconductor memory using dynamic ram cells
Grant 4,943,944 - Sakui , et al. July 24, 1
1990-07-24
Divided bit line type dynamic random access memory with charging/discharging current suppressor
Grant 4,926,382 - Sakui , et al. May 15, 1
1990-05-15
High-speed refreshing rechnique for highly-integrated random-access memory
Grant 4,819,207 - Sakui , et al. April 4, 1
1989-04-04
Word line driver for use in a semiconductor memory
Grant 4,798,977 - Sakui , et al. January 17, 1
1989-01-17
Semiconductor integrated circuit device
Grant 4,780,854 - Watanabe , et al. October 25, 1
1988-10-25
Divided-bit line type dynamic semiconductor memory with main and sub-sense amplifiers
Grant 4,777,625 - Sakui , et al. October 11, 1
1988-10-11
Dynamic semiconductor memory with static data storing cell unit
Grant 4,758,987 - Sakui July 19, 1
1988-07-19
MOS dynamic random access memory
Grant 4,628,486 - Sakui December 9, 1
1986-12-09

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