Sako; Norimitsu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sako; Norimitsu.The latest application filed is for "simple-matrix liquid crystal driving method, liquid crystal driver, and liquid crystal display apparatus".

Company Profile

0.15.13

Sako; Norimitsu - Chiba JP
Sako; Norimitsu - Chiba-shi JP
Sako; Norimitsu - Tokyo JP
Sako; Norimitsu - Mihama-ku JP
Sako; Norimitsu - Chiyoda-ku JP
Sako, Norimitsu - Okayama JP
Sako; Norimitsu - Funabashi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for driving passive matrix liquid crystal Grant 7,403,195 - Sako , et al. July 22, 2	2008-07-22
Simple-matrix liquid crystal driving method, liquid crystal driver, and liquid crystal display apparatus App 20080042964 - Sako; Norimitsu ; et al.	2008-02-21
Method and apparatus for driving passive matrix liquid crystal Grant 7,209,129 - Sako , et al. April 24, 2	2007-04-24
Pass-transistor logic circuit and a method of designing thereof Grant 7,171,636 - Sako January 30, 2	2007-01-30
Pass-transistor logic circuit and a method of designing thereof Grant 7,120,894 - Sako October 10, 2	2006-10-10
Method and apparatus for driving passive matrix liquid crystal App 20060033692 - Sako; Norimitsu ; et al.	2006-02-16
Method and apparatus for driving passive matrix liquid crystal App 20060033693 - Sako; Norimitsu ; et al.	2006-02-16
CMOS image sensor having block scanning capability Grant 6,933,973 - Sako August 23, 2	2005-08-23
Multiline addressing drive method and apparatus for passive matrix liquid crystal, and a liquid crystal panel App 20040189581 - Sako, Norimitsu ; et al.	2004-09-30
LCD driver in multi-line selection driving method Grant 6,727,879 - Sako April 27, 2	2004-04-27
Simple matrix liquid crystal drive method and apparatus App 20040046726 - Sako, Norimitsu ; et al.	2004-03-11
Pass-transistor logic circuit and a method of designing thereof App 20040025120 - Sako, Norimitsu	2004-02-05
Pass-transistor logic circuit and a method of designing thereof App 20030204824 - Sako, Norimitsu	2003-10-30
Pattern output circuit and pattern output method Grant 6,630,940 - Sako October 7, 2	2003-10-07
Pattern output circuit and pattern output method App 20020044114 - Sako, Norimitsu	2002-04-18
Pass-transistor logic circuit and a method of designing thereof App 20020042903 - Sako, Norimitsu	2002-04-11
Multi line selection LCD driver App 20020030655 - Sako, Norimitsu	2002-03-14
LCD driver in multi-line selection driving method App 20020024487 - Sako, Norimitsu	2002-02-28
Pass-transistor logic circuit and a method of designing thereof App 20010000823 - Sako, Norimitsu	2001-05-03
Pass transistor logic circuit and a method of designing thereof App 20010000824 - Sako, Norimitsu	2001-05-03
Semiconductor integrated circuit capable of realizing logic functions Grant 6,194,914 - Sako February 27, 2	2001-02-27
Pass-transistor logic circuit and a method of designing thereof Grant 6,185,719 - Sako February 6, 2	2001-02-06
Semiconductor integrated circuit capable of realizing logic functions Grant 6,097,221 - Sako August 1, 2	2000-08-01
Logic circuit utilizing pass transistors and logic gate Grant 6,084,437 - Sako July 4, 2	2000-07-04
Semiconductor devices Grant 5,684,732 - Sako November 4, 1	1997-11-04
Programmable logic device Grant 5,327,023 - Kawana , et al. July 5, 1	1994-07-05
Multichip module with multilayer wiring substrate Grant 5,258,891 - Sako November 2, 1	1993-11-02
Semiconductor memory circuit Grant 4,985,867 - Ishii , et al. January 15, 1	1991-01-15

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.