SAHU; Rahul

Patent Applications and Registrations

Patent applications and USPTO patent grants for SAHU; Rahul.The latest application filed is for "high-speed multi-port memory supporting collision".

Company Profile

11.25.24

SAHU; Rahul - Bangalore IN
Sahu; Rahul - Uttar Pradesh IN
Sahu; Rahul - Kasganj-Kanshiram-Nagar IN
Sahu; Rahul - Utter Pradesh IN
- Uttar Pradesh IN
- Bangalore IN
Sahu; Rahul - Karnataka IN
Sahu; Rahul - Nagar IN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
High-speed Multi-port Memory Supporting Collision App 20220310156 - RAJ; Pradeep ; et al.	2022-09-29
Low Power and Robust Level-Shifting Pulse Latch for Dual-Power Memories App 20220293148 - Bhaskaran; Adithya ; et al.	2022-09-15
Systems and methods for control signal latching in memories Grant 11,152,921 - Boda , et al. October 19, 2	2021-10-19
Write assist circuitry for memory Grant 11,049,552 - Raj , et al. June 29, 2	2021-06-29
Area efficient write data path circuit for SRAM yield enhancement Grant 10,867,668 - Gupta , et al. December 15, 2	2020-12-15
Memory Core Power-up With Reduced Peak Current App 20200381023 - MOHANTY; Shiba Narayan ; et al.	2020-12-03
Memory core power-up with reduced peak current Grant 10,839,866 - Mohanty , et al. November 17, 2	2020-11-17
SRAM write yield enhancement with pull-up strength modulation Grant 10,811,086 - Mohanty , et al. October 20, 2	2020-10-20
Access assist with wordline adjustment with tracking cell Grant 10,811,088 - Raj , et al. October 20, 2	2020-10-20
Access Assist With Wordline Adjustment With Tracking Cell App 20200294580 - Raj; Pradeep ; et al.	2020-09-17
Boost Generation Circuitry For Memory App 20200126604 - MOHANTY; Shiba Narayan ; et al.	2020-04-23
Boost generation circuitry for memory Grant 10,614,865 - Mohanty , et al.	2020-04-07
Area Efficient Write Data Path Circuit For Sram Yield Enhancement App 20190108872 - GUPTA; Sharad Kumar ; et al.	2019-04-11
Wordline adjustment scheme Grant 9,928,898 - Sahu , et al. March 27, 2	2018-03-27
Write driver circuitry to reduce leakage of negative boost charge Grant 9,916,892 - Raj , et al. March 13, 2	2018-03-13
Write data path to reduce charge leakage of negative boost Grant 9,865,337 - Ahmed , et al. January 9, 2	2018-01-09
Wordline Adjustment Scheme App 20170287551 - SAHU; Rahul ; et al.	2017-10-05
Architecture to improve write-ability in SRAM Grant 9,721,650 - Raj , et al. August 1, 2	2017-08-01
Adaptive negative bit line write assist Grant 9,455,028 - Sahu September 27, 2	2016-09-27
Memory sense amplifier and column pre-charger Grant 9,281,055 - Sahu , et al. March 8, 2	2016-03-08
Dual rail single-ended read data paths for static random access memories Grant 9,177,635 - Evans , et al. November 3, 2	2015-11-03
Bit line write assist for static random access memory architectures Grant 9,177,633 - Roy , et al. November 3, 2	2015-11-03
Word Line Decoders For Dual Rail Static Random Access Memories App 20150302918 - Roy; Rajiv Kumar ; et al.	2015-10-22
Memory Sense Amplifier And Column Pre-Charger App 20150269990 - Sahu; Rahul ; et al.	2015-09-24
Bit Line Write Assist For Static Random Access Memory Architectures App 20150255148 - Roy; Rajiv Kumar ; et al.	2015-09-10
Differential latch word line assist for SRAM Grant 9,111,637 - Sahu , et al. August 18, 2	2015-08-18
Integrated Read/write Tracking In Sram App 20150213881 - Rai; Dharmendra Kumar ; et al.	2015-07-30
Memory device having control circuitry for write tracking using feedback-based controller Grant 9,047,936 - Vikash , et al. June 2, 2	2015-06-02
Interleaved Write Assist For Hierarchical Bitline Sram Architectures App 20150138863 - Roy; Rajiv Kumar ; et al.	2015-05-21
Memory Architecture With Alternating Segments And Multiple Bitlines App 20150138864 - Evans; Donald Albert ; et al.	2015-05-21
Bit-Line Discharge Assistance in Memory Devices App 20150085592 - Rai; Dharmendra Kumar ; et al.	2015-03-26
Memory having self-timed edge-detection write tracking Grant 08923069 -	2014-12-30
Address decoding circuits for reducing address and memory enable setup time Grant 08923090 -	2014-12-30
Memory having self-timed edge-detection write tracking Grant 8,923,069 - Sahu , et al. December 30, 2	2014-12-30
Address decoding circuits for reducing address and memory enable setup time Grant 8,923,090 - Evans , et al. December 30, 2	2014-12-30
Pre-charge tracking of global read lines in high speed SRAM Grant 8,879,303 - Chandwani , et al. November 4, 2	2014-11-04
Margin free PVT tolerant fast self-timed sense amplifier reset circuit Grant 8,830,766 - Sahu September 9, 2	2014-09-09
Write-tracking Circuitry For Memory Devices App 20140233302 - Rai; Dharmendra Kumar ; et al.	2014-08-21
Write-tracking circuitry for memory devices Grant 8,811,070 - Rai , et al. August 19, 2	2014-08-19
Memory having sense amplifier for output tracking by controlled feedback latch Grant 8,792,267 - Chandwani , et al. July 29, 2	2014-07-29
Margin Free Pvt Tolerant Fast Self-timed Sense Amplifier Reset Circuit App 20140204683 - Sahu; Rahul	2014-07-24
Memory Having Sense Amplifier For Output Tracking By Controlled Feedback Latch App 20140204660 - Chandwani; Kamal ; et al.	2014-07-24
Pre-charge Tracking Of Global Read Lines In High Speed Sram App 20140185366 - Chandwani; Kamal ; et al.	2014-07-03
Memory Device With Clock Generation Based On Segmented Address Change Detection App 20140071783 - Sahu; Rahul ; et al.	2014-03-13
Memory Device Having Control Circuitry for Write Tracking Using Feedback-Based Controller App 20130322190 - Vikash; ; et al.	2013-12-05
Memory Having Self-timed Edge-detection Write Tracking App 20130322193 - Sahu; Rahul ; et al.	2013-12-05