Sahota; Kashmir S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sahota; Kashmir S..The latest application filed is for "semiconductor device with high conductivity region using shallow trench".

Company Profile

0.17.5

Sahota; Kashmir S. - Fremont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Device With High Conductivity Region Using Shallow Trench App 20070166938 - Erhardt; Jeffrey P. ; et al.	2007-07-19
Semiconductor device with high conductivity region using shallow trench Grant 7,208,382 - Erhardt , et al. April 24, 2	2007-04-24
Slurry-less polishing for removal of excess interconnect material during fabrication of a silicon integrated circuit Grant 7,141,502 - Xie , et al. November 28, 2	2006-11-28
Method for semiconductor wafer planarization by isolation material growth Grant 7,052,969 - Sahota , et al. May 30, 2	2006-05-30
Memory wordline spacer Grant 7,053,446 - Sahota , et al. May 30, 2	2006-05-30
Semiconductor component and method of manufacture Grant 6,927,113 - Sahota , et al. August 9, 2	2005-08-09
Memory wordline spacer Grant 6,773,988 - Sahota , et al. August 10, 2	2004-08-10
Method for semiconductor wafer planarization by CMP stop layer formation Grant 6,770,523 - Sahota , et al. August 3, 2	2004-08-03
Method for manufacturing memory with high conductivity bitline and shallow trench isolation integration Grant 6,723,605 - Erhardt , et al. April 20, 2	2004-04-20
Prevention of precipitation defects on copper interconnects during CMP by use of solutions containing organic compounds with silica adsorption and copper corrosion inhibiting properties Grant 6,720,264 - Sahota , et al. April 13, 2	2004-04-13
Conductor abrasiveless chemical-mechanical polishing in integrated circuit interconnects Grant 6,699,785 - Yang , et al. March 2, 2	2004-03-02
Prevention Of Precipitation Defects On Copper Interconnects During Cpm By Use Of Solutions Containing Organic Compounds With Silica Adsorption And Copper Corrosion Inhibiting Properties App 20040014319 - Sahota, Kashmir S. ; et al.	2004-01-22
Conductor abrasiveless chemical-mechanical polishing in integrated circuit interconnects App 20030146512 - Yang, Kai ; et al.	2003-08-07
Ta barrier slurry containing an organic additive Grant 6,503,418 - Sahota , et al. January 7, 2	2003-01-07
Conductor chemical-mechanical polishing in integrated circuit interconnects App 20020173140 - Sahota, Kashmir S. ; et al.	2002-11-21
Dielectric protected chemical-mechanical polishing in integrated circuit interconnects Grant 6,413,869 - Achuthan , et al. July 2, 2	2002-07-02
Ta Barrier Slurry Containing An Organic Additive App 20020005504 - SAHOTA, KASHMIR S. ; et al.	2002-01-17
Polishing pad and method for polishing porous materials Grant 6,217,418 - Lukanc , et al. April 17, 2	2001-04-17
Method for multiple phase polishing of a conductive layer in a semidonductor wafer Grant 6,184,141 - Avanzino , et al. February 6, 2	2001-02-06
Method for fabricating dishing free shallow isolation trenches Grant 5,923,993 - Sahota July 13, 1	1999-07-13
High removal rate chemical-mechanical polishing Grant 5,665,201 - Sahota September 9, 1	1997-09-09
Methodology for developing product-specific interlayer dielectric polish processes Grant 5,665,199 - Sahota , et al. September 9, 1	1997-09-09

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