SAHA; Sourav
Patent Applications and Registrations
Patent applications and USPTO patent grants for SAHA; Sourav.The latest application filed is for "dimpled contact lens".
Company Profile
6.74.74
- SAHA; Sourav - Pleasanton CA
- Saha; Sourav - Kolkata IN
- Saha; Sourav - Barrackpur IN
- Saha; Sourav - Kolkarta IN
- Saha; Sourav - Barrackpore IN
- Saha; Sourav - Fremont CA US
- Saha; Sourav - Bangalore IN
- Saha; Sourav - Tallahassee FL US
Patent Activity
| Patent | Date |
|---|---|
| Dimpled Contact Lens App 20220066238 - LINN; Matthew S. ; et al. | 2022-03-03 |
| Integrated circuit design changes using through-silicon vias Grant 10,956,644 - Barowski , et al. March 23, 2 | 2021-03-23 |
| Contact Lenses with Microchannels App 20200387009 - Saha; Sourav ; et al. | 2020-12-10 |
| Layout of large block synthesis blocks in integrated circuits Grant 10,534,884 - Barowski , et al. Ja | 2020-01-14 |
| Layout Of Large Block Synthesis Blocks In Integrated Circuits App 20190294739 - Barowski; Harry ; et al. | 2019-09-26 |
| Layout of large block synthesis blocks in integrated circuits Grant 10,417,366 - Barowski , et al. Sept | 2019-09-17 |
| Layout of large block synthesis blocks in integrated circuits Grant 10,366,191 - Barowski , et al. July 30, 2 | 2019-07-30 |
| Integrated Circuit Design Changes Using Through-silicon Vias App 20190220570 - Barowski; Harry ; et al. | 2019-07-18 |
| Layout of large block synthesis blocks in integrated circuits Grant 10,242,140 - Barowski , et al. | 2019-03-26 |
| Layout of large block synthesis blocks in integrated circuits Grant 10,235,487 - Barowski , et al. | 2019-03-19 |
| Congestion aware layer promotion Grant 10,229,238 - Berry , et al. | 2019-03-12 |
| Placement clustering-based white space reservation Grant 10,223,489 - Barowski , et al. | 2019-03-05 |
| Integrated circuit design changes using through-silicon vias Grant 10,223,491 - Barowski , et al. | 2019-03-05 |
| Layout Of Large Block Synthesis Blocks In Integrated Circuits App 20190065636 - Barowski; Harry ; et al. | 2019-02-28 |
| Layout Of Large Block Synthesis Blocks In Integrated Circuits App 20190065635 - Barowski; Harry ; et al. | 2019-02-28 |
| Timing constraints formulation for highly replicated design modules Grant 10,169,523 - Ravindranath , et al. J | 2019-01-01 |
| Area sharing between multiple large block synthesis (LBS) blocks Grant 10,169,519 - Barowski , et al. J | 2019-01-01 |
| Critical region identification Grant 10,140,414 - Antony , et al. Nov | 2018-11-27 |
| Global routing framework of integrated circuit based on localized routing optimization Grant 10,120,970 - Mueller , et al. November 6, 2 | 2018-11-06 |
| Area Sharing Between Multiple Large Block Synthesis (lbs) Blocks App 20180189439 - Barowski; Harry ; et al. | 2018-07-05 |
| Placement Clustering-based White Space Reservation App 20180150584 - Barowski; Harry ; et al. | 2018-05-31 |
| Area sharing between multiple large block synthesis (LBS) blocks Grant 9,946,830 - Barowski , et al. April 17, 2 | 2018-04-17 |
| Layout Of Large Block Synthesis Blocks In Integrated Circuits App 20180101626 - Barowski; Harry ; et al. | 2018-04-12 |
| Layout Of Large Block Synthesis Blocks In Integrated Circuits App 20180101625 - Barowski; Harry ; et al. | 2018-04-12 |
| Layout of large block synthesis blocks in integrated circuits Grant 9,928,329 - Barowski , et al. March 27, 2 | 2018-03-27 |
| Layout of large block synthesis blocks in integrated circuits Grant 9,910,948 - Barowski , et al. March 6, 2 | 2018-03-06 |
| Constraint-driven pin optimization for hierarchical design convergence Grant 9,858,377 - Berry , et al. January 2, 2 | 2018-01-02 |
| Global Routing Framework Of Integrated Circuit Based On Localized Routing Optimization App 20170357744 - Mueller; Dirk ; et al. | 2017-12-14 |
| Area Sharing Between Multiple Large Block Synthesis (lbs) Blocks App 20170351798 - Barowski; Harry ; et al. | 2017-12-07 |
| Cross-hierarchy interconnect adjustment for power recovery Grant 9,798,847 - Berry , et al. October 24, 2 | 2017-10-24 |
| Control path power adjustment for chip design Grant 9,734,270 - Berry , et al. August 15, 2 | 2017-08-15 |
| Slack redistribution for additional power recovery Grant 9,734,268 - Berry , et al. August 15, 2 | 2017-08-15 |
| Layout Of Large Block Synthesis Blocks In Integrated Circuits App 20170212969 - Barowski; Harry ; et al. | 2017-07-27 |
| Layout Of Large Block Synthesis Blocks In Integrated Circuits App 20170212970 - Barowski; Harry ; et al. | 2017-07-27 |
| Hierarchical wire-pin co-optimization Grant 9,715,572 - Berry , et al. July 25, 2 | 2017-07-25 |
| Physical aware technology mapping in synthesis Grant 9,715,565 - Berry , et al. July 25, 2 | 2017-07-25 |
| Physical aware technology mapping in synthesis Grant 9,710,585 - Berry , et al. July 18, 2 | 2017-07-18 |
| Control path power adjustment for chip design Grant 9,703,910 - Berry , et al. July 11, 2 | 2017-07-11 |
| Timing constraints formulation for highly replicated design modules Grant 9,703,924 - Ravindranath , et al. July 11, 2 | 2017-07-11 |
| Timing constraints formulation for highly replicated design modules Grant 9,703,923 - Ravindranath , et al. July 11, 2 | 2017-07-11 |
| Intra-run design decision process for circuit synthesis Grant 9,703,920 - Berry , et al. July 11, 2 | 2017-07-11 |
| Hierarchical wire-pin co-optimization Grant 9,697,322 - Berry , et al. July 4, 2 | 2017-07-04 |
| Intra-run design decision process for circuit synthesis Grant 9,690,900 - Berry , et al. June 27, 2 | 2017-06-27 |
| Slack redistribution for additional power recovery Grant 9,684,751 - Berry , et al. June 20, 2 | 2017-06-20 |
| De-coupling capacitance placement Grant 9,684,759 - Barowski , et al. June 20, 2 | 2017-06-20 |
| Cross-hierarchy interconnect adjustment for power recovery Grant 9,684,757 - Berry , et al. June 20, 2 | 2017-06-20 |
| Circuit placement with electro-migration mitigation Grant 9,679,101 - Folberth , et al. June 13, 2 | 2017-06-13 |
| De-coupling capacitance placement Grant 9,679,099 - Barowski , et al. June 13, 2 | 2017-06-13 |
| Virtual positive slack in physical synthesis Grant 9,672,322 - Berry , et al. June 6, 2 | 2017-06-06 |
| Virtual positive slack in physical synthesis Grant 9,672,321 - Berry , et al. June 6, 2 | 2017-06-06 |
| Logic structure aware circuit routing Grant 9,672,314 - Gupta , et al. June 6, 2 | 2017-06-06 |
| Integrated Circuit Design Changes Using Through-silicon Vias App 20170154148 - Barowski; Harry ; et al. | 2017-06-01 |
| Critical region identification Grant 9,659,140 - Antony , et al. May 23, 2 | 2017-05-23 |
| Logic structure aware circuit routing Grant 9,659,135 - Gupta , et al. May 23, 2 | 2017-05-23 |
| Constraint-driven Pin Optimization For Hierarchical Design Convergence App 20170132349 - Berry; Christopher J. ; et al. | 2017-05-11 |
| Through-silicon via access device for integrated circuits Grant 9,633,928 - Barowski , et al. April 25, 2 | 2017-04-25 |
| Timing Constraints Formulation For Highly Replicated Design Modules App 20170091374 - Ravindranath; Chithra ; et al. | 2017-03-30 |
| Cross-hierarchy Interconnect Adjustment For Power Recovery App 20170091370 - Berry; Christopher J. ; et al. | 2017-03-30 |
| Logic Structure Aware Circuit Routing App 20170083657 - Gupta; Saurabh ; et al. | 2017-03-23 |
| Timing Constraints Formulation For Highly Replicated Design Modules App 20170083662 - Ravindranath; Chithra ; et al. | 2017-03-23 |
| Logic Structure Aware Circuit Routing App 20170083656 - Gupta; Saurabh ; et al. | 2017-03-23 |
| Timing Constraints Formulation For Highly Replicated Design Modules App 20170061060 - Ravindranath; Chithra ; et al. | 2017-03-02 |
| Timing Constraints Formulation For Highly Replicated Design Modules App 20170061065 - Ravindranath; Chithra ; et al. | 2017-03-02 |
| Timing constraints formulation for highly replicated design modules Grant 9,576,102 - Ravindranath , et al. February 21, 2 | 2017-02-21 |
| Slack Redistribution For Additional Power Recovery App 20170046464 - Berry; Christopher J. ; et al. | 2017-02-16 |
| Congestion Aware Layer Promotion App 20170046468 - Berry; Christopher J. ; et al. | 2017-02-16 |
| Logic Structure Aware Circuit Routing App 20170046466 - Gupta; Saurabh ; et al. | 2017-02-16 |
| Logic Structure Aware Circuit Routing App 20170046467 - Gupta; Saurabh ; et al. | 2017-02-16 |
| Slack Redistribution For Additional Power Recovery App 20170046463 - Berry; Christopher J. ; et al. | 2017-02-16 |
| Integrated circuit design changes using through-silicon vias Grant 9,569,580 - Barowski , et al. February 14, 2 | 2017-02-14 |
| Logic structure aware circuit routing Grant 9,569,581 - Gupta , et al. February 14, 2 | 2017-02-14 |
| Placement aware functional engineering change order extraction Grant 9,563,736 - Antony , et al. February 7, 2 | 2017-02-07 |
| Olefin oligomerization process Grant 9,550,705 - Tosin , et al. January 24, 2 | 2017-01-24 |
| Cross-hierarchy interconnect adjustment for power recovery Grant 9,552,451 - Berry , et al. January 24, 2 | 2017-01-24 |
| Hierarchical Wire-pin Co-optimization App 20170011162 - Berry; Christopher J. ; et al. | 2017-01-12 |
| Control Path Power Adjustment For Chip Design App 20170011157 - Berry; Christopher J. ; et al. | 2017-01-12 |
| Cross-hierarchy Interconnect Adjustment For Power Recovery App 20170011158 - Berry; Christopher J. ; et al. | 2017-01-12 |
| Control Path Power Adjustment For Chip Design App 20170011156 - Berry; Christopher J. ; et al. | 2017-01-12 |
| Hierarchical Wire-pin Co-optimization App 20170011163 - Berry; Christopher J. ; et al. | 2017-01-12 |
| Cross-hierarchy Interconnect Adjustment For Power Recovery App 20170011159 - Berry; Christopher J. ; et al. | 2017-01-12 |
| Selective mirroring in caches for logical volumes Grant 9,542,327 - Samanta , et al. January 10, 2 | 2017-01-10 |
| Intra-run Design Decision Process For Circuit Synthesis App 20170004246 - Berry; Christopher J. ; et al. | 2017-01-05 |
| Virtual Positive Slack In Physical Synthesis App 20170004247 - Berry; Christopher J. ; et al. | 2017-01-05 |
| Intra-run Design Decision Process For Circuit Synthesis App 20170004243 - Berry; Christopher J. ; et al. | 2017-01-05 |
| De-coupling Capacitance Placement App 20170004239 - Barowski; Harry ; et al. | 2017-01-05 |
| De-coupling Capacitance Placement App 20170004248 - Barowski; Harry ; et al. | 2017-01-05 |
| Virtual Positive Slack In Physical Synthesis App 20170004245 - Berry; Christopher J. ; et al. | 2017-01-05 |
| Circuit placement with electro-migration mitigation Grant 9,536,037 - Folberth , et al. January 3, 2 | 2017-01-03 |
| Congestion aware layer promotion Grant 9,514,265 - Berry , et al. December 6, 2 | 2016-12-06 |
| Integrated circuit design changes using through-silicon vias Grant 9,501,603 - Barowski , et al. November 22, 2 | 2016-11-22 |
| Congestion aware layer promotion Grant 9,495,502 - Berry , et al. November 15, 2 | 2016-11-15 |
| Circuit routing based on total negative slack Grant 9,483,601 - Folberth , et al. November 1, 2 | 2016-11-01 |
| Boundary based power guidance for physical synthesis Grant 9,471,735 - Chakrabarti , et al. October 18, 2 | 2016-10-18 |
| Circuit routing based on total negative slack Grant 9,471,741 - Folberth , et al. October 18, 2 | 2016-10-18 |
| Circuit Routing Based On Total Negative Slack App 20160283638 - Folberth; Harald D. ; et al. | 2016-09-29 |
| Circuit Routing Based On Total Negative Slack App 20160283637 - Folberth; Harald D. ; et al. | 2016-09-29 |
| Physical Aware Technology Mapping In Synthesis App 20160275215 - Berry; Christopher J. ; et al. | 2016-09-22 |
| Physical Aware Technology Mapping In Synthesis App 20160275214 - Berry; Christopher J. ; et al. | 2016-09-22 |
| Circuit Placement With Electro-migration Mitigation App 20160267211 - Folberth; Harald D. ; et al. | 2016-09-15 |
| Circuit Placement With Electro-migration Mitigation App 20160267215 - Folberth; Harald D. ; et al. | 2016-09-15 |
| Boundary based power guidance for physical synthesis Grant 9,443,049 - Chakrabarti , et al. September 13, 2 | 2016-09-13 |
| Physical aware technology mapping in synthesis Grant 9,443,047 - Chakrabarti , et al. September 13, 2 | 2016-09-13 |
| Physical aware technology mapping in synthesis Grant 9,443,048 - Berry , et al. September 13, 2 | 2016-09-13 |
| Virtual sub-net based routing Grant 9,418,190 - Nam , et al. August 16, 2 | 2016-08-16 |
| Critical Region Identification App 20160217248 - Antony; George ; et al. | 2016-07-28 |
| Path-based congestion reduction in integrated circuit routing Grant 9,384,316 - Folberth , et al. July 5, 2 | 2016-07-05 |
| System and method of hinted cache data removal Grant 9,378,151 - Agarwal , et al. June 28, 2 | 2016-06-28 |
| Critical region identification Grant 9,378,326 - Antony , et al. June 28, 2 | 2016-06-28 |
| Boundary Based Power Guidance For Physical Synthesis App 20160098497 - Chakrabarti; Pinaki ; et al. | 2016-04-07 |
| Boundary based power guidance for physical synthesis Grant 9,286,428 - Chakrabarti , et al. March 15, 2 | 2016-03-15 |
| Critical Region Identification App 20160070849 - Antony; George ; et al. | 2016-03-10 |
| Integrated Circuit Design Changes Using Through-silicon Vias App 20160070840 - Barowski; Harry ; et al. | 2016-03-10 |
| Integrated Circuit Design Changes Using Through-silicon Vias App 20160070842 - Barowski; Harry ; et al. | 2016-03-10 |
| Through-silicon Via Access Device For Integrated Circuits App 20160071786 - Barowski; Harry ; et al. | 2016-03-10 |
| Through-silicon Via Access Device For Integrated Circuits App 20160071783 - Barowski; Harry ; et al. | 2016-03-10 |
| Critical Region Identification App 20160070845 - Antony; George ; et al. | 2016-03-10 |
| Boundary Based Power Guidance For Physical Synthesis App 20160042098 - Chakrabarti; Pinaki ; et al. | 2016-02-11 |
| Selective Mirroring In Caches For Logical Volumes App 20160026575 - Samanta; Sumanesh ; et al. | 2016-01-28 |
| Boundary based power guidance for physical synthesis Grant 9,245,074 - Chakrabarti , et al. January 26, 2 | 2016-01-26 |
| Virtual sub-net based routing Grant 9,245,084 - Nam , et al. January 26, 2 | 2016-01-26 |
| Path-based Congestion Reduction In Integrated Circuit Routing App 20160012172 - Folberth; Harald ; et al. | 2016-01-14 |
| Physical Aware Technology Mapping In Synthesis App 20150347640 - Berry; Christopher J. ; et al. | 2015-12-03 |
| Congestion Aware Layer Promotion App 20150347661 - Berry; Christopher J. ; et al. | 2015-12-03 |
| Congestion Aware Layer Promotion App 20150347662 - Berry; Christopher J. ; et al. | 2015-12-03 |
| Physical Aware Technology Mapping In Synthesis App 20150347643 - Berry; Christopher J. ; et al. | 2015-12-03 |
| Virtual Sub-net Based Routing App 20150334022 - Nam; Gi-Joon ; et al. | 2015-11-19 |
| Virtual Sub-net Based Routing App 20150331987 - Nam; Gi-Joon ; et al. | 2015-11-19 |
| Placement Aware Functional Engineering Change Order Extraction App 20150242559 - Antony; George ; et al. | 2015-08-27 |
| Boundary Based Power Guidance For Physical Synthesis App 20150234948 - Chakrabarti; Pinaki ; et al. | 2015-08-20 |
| Boundary Based Power Guidance For Physical Synthesis App 20150234949 - Chakrabarti; Pinaki ; et al. | 2015-08-20 |
| Congestion estimation techniques at pre-synthesis stage Grant 9,092,587 - Saha , et al. July 28, 2 | 2015-07-28 |
| Thermally aware pin assignment and device placement Grant 9,053,285 - Darden , et al. June 9, 2 | 2015-06-09 |
| Congestion Estimation Techniques At Pre-synthesis Stage App 20150113488 - Saha; Sourav ; et al. | 2015-04-23 |
| Thermally Aware Pin Assignment And Device Placement App 20150113496 - Darden; Randall J. ; et al. | 2015-04-23 |
| Congestion Estimation Techniques At Pre-synthesis Stage App 20150113490 - Saha; Sourav ; et al. | 2015-04-23 |
| Congestion estimation techniques at pre-synthesis stage Grant 9,009,642 - Saha , et al. April 14, 2 | 2015-04-14 |
| Median line based critical timing path optimization Grant 8,966,422 - Reddy , et al. February 24, 2 | 2015-02-24 |
| System and Method of Hinted Cache Data Removal App 20150039835 - Agarwal; Vineet ; et al. | 2015-02-05 |
| Creating regional routing blockages in integrated circuit design Grant 8,930,873 - Alpert , et al. January 6, 2 | 2015-01-06 |
| Computational thermal analysis during microchip design Grant 8,826,208 - Saha , et al. September 2, 2 | 2014-09-02 |
| Olefin Oligomerization Process App 20140221716 - Tosin; Geraldine ; et al. | 2014-08-07 |
| Colorimetric and fluorimetric fluoride sensing Grant 8,541,240 - Saha , et al. September 24, 2 | 2013-09-24 |
| Colorimetric And Fluorimetric Fluoride Sensing App 20110294229 - Saha; Sourav ; et al. | 2011-12-01 |
| Inverter based return-to-zero (RZ)+non-RZ (NRZ) signaling Grant 7,710,295 - Somasekhar , et al. May 4, 2 | 2010-05-04 |
| Inverter based return-to-zero (RZ)+ Non-RZ (NRZ) signaling App 20080152356 - Somasekhar; Dinesh ; et al. | 2008-06-26 |
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