Safran; John Matthew

Patent Applications and Registrations

Patent applications and USPTO patent grants for Safran; John Matthew.The latest application filed is for "post zero via layer keep out zone over through silicon via reducing beol pumping effects".

Company Profile

0.7.6

Safran; John Matthew - Wappingers Falls NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Post zero via layer keep out zone over through silicon via reducing BEOL pumping effects Grant 10,199,315 - Farooq , et al. Fe	2019-02-05
Post Zero Via Layer Keep Out Zone Over Through Silicon Via Reducing Beol Pumping Effects App 20180061749 - Farooq; Mukta Ghate ; et al.	2018-03-01
Structures and methods for monitoring dielectric reliability with through-silicon vias Grant 9,404,953 - Chen , et al. August 2, 2	2016-08-02
Physical design symmetry and integrated circuits enabling three dimentional (3D) yield optimization for wafer to wafer stacking Grant 9,029,234 - Safran , et al. May 12, 2	2015-05-12
Structures and Methds for Monitoring Dielectric Reliability With Through-Silicon Vias App 20150115982 - Chen; Fen ; et al.	2015-04-30
Physical Design Symmetry And Integrated Circuits Enabling Threedimentional (3d) Yield Optimization For Wafer To Wafer Stacking App 20130307159 - Safran; John Matthew ; et al.	2013-11-21
Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor Grant 8,159,040 - Coolbaugh , et al. April 17, 2	2012-04-17
Implementing precise resistance measurement for 2D array efuse bit cell using differential sense amplifier, balanced bitlines, and programmable reference resistor Grant 7,764,531 - Aipperspach , et al. July 27, 2	2010-07-27
Implementing Precise Resistance Measurement for 2D Array Efuse Bit Cell Using Differential Sense Amplifier, Balanced Bitlines, and Programmable Reference Resistor App 20100067319 - Aipperspach; Anthony Gus ; et al.	2010-03-18
Metal Gate Integration Structure And Method Including Metal Fuse, Anti-fuse And/or Resistor App 20090283840 - Coolbaugh; Douglas D. ; et al.	2009-11-19
Programming current stabilized electrical fuse programming circuit and method Grant 7,432,755 - Park , et al. October 7, 2	2008-10-07

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