loadpatents
name:-0.029406070709229
name:-0.02265191078186
name:-0.00051307678222656
SAFFORD; Kevin David Patent Filings

SAFFORD; Kevin David

Patent Applications and Registrations

Patent applications and USPTO patent grants for SAFFORD; Kevin David.The latest application filed is for "method and apparatus for protecting trace data of a remote debug session".

Company Profile
0.24.23
  • SAFFORD; Kevin David - Fort Collins CO
  • Safford, Kevin David - Ft. Collins CO
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method And Apparatus For Protecting Trace Data Of A Remote Debug Session
App 20210303443 - MCCONNELL; Loren James ;   et al.
2021-09-30
Method and apparatus for communicating information between lock stepped processors
Grant 7,725,899 - Safford , et al. May 25, 2
2010-05-25
Method and apparatus for seeding differences in lock-stepped processors
Grant 7,398,419 - Safford , et al. July 8, 2
2008-07-08
Method and apparatus for recovery from loss of lock step
Grant 7,370,232 - Safford May 6, 2
2008-05-06
Method and apparatus for implementing two architectures in a chip
Grant 7,343,479 - Knebel , et al. March 11, 2
2008-03-11
Lockstep error signaling
Grant 7,296,181 - Safford , et al. November 13, 2
2007-11-13
Core-level processor lockstepping
Grant 7,290,169 - Safford , et al. October 30, 2
2007-10-30
Architectural support for selective use of high-reliability mode in a computer system
Grant 7,287,185 - Safford , et al. October 23, 2
2007-10-23
Off-chip lockstep checking
Grant 7,237,144 - Safford , et al. June 26, 2
2007-06-26
Method and apparatus for communicating information between lock stepped processors
App 20070061812 - Safford; Kevin David ;   et al.
2007-03-15
Method and apparatus for communicating information between lock stepped processors
Grant 7,155,721 - Safford , et al. December 26, 2
2006-12-26
Method and apparatus for verifying the correctness of a processor behavioral model
Grant 7,139,936 - Petsinger , et al. November 21, 2
2006-11-21
Method and apparatus for recovery from loss of lock step
App 20060248384 - Safford; Kevin David
2006-11-02
Detection of bit errors in maskable content addressable memories
Grant 7,100,097 - Patella , et al. August 29, 2
2006-08-29
Method and apparatus for recovery from loss of lock step
Grant 7,085,959 - Safford August 1, 2
2006-08-01
Method and apparatus for seeding differences in lock-stepped processors
App 20060085677 - Safford; Kevin David ;   et al.
2006-04-20
Method and apparatus for seeding differences in lock-stepped processors
Grant 7,003,691 - Safford , et al. February 21, 2
2006-02-21
Method and apparatus for verifying resources shared by multiple processors
App 20060036424 - Petsinger; Jeremy P. ;   et al.
2006-02-16
Lockstep error signaling
App 20050240829 - Safford, Kevin David ;   et al.
2005-10-27
Architectural support for selective use of high-reliability mode in a computer system
App 20050240793 - Safford, Kevin David ;   et al.
2005-10-27
Off-chip lockstep checking
App 20050240810 - Safford, Kevin David ;   et al.
2005-10-27
Core-level processor lockstepping
App 20050240811 - Safford, Kevin David ;   et al.
2005-10-27
Systems and methods for verifying lockstep operation
App 20050120278 - Smith, Zachary Steven ;   et al.
2005-06-02
Systems and methods for verifying core determinacy
App 20050114735 - Smith, Zachary Steven ;   et al.
2005-05-26
Method and computer system for decomposing macroinstructions into microinstructions and forcing the parallel issue of at least two microinstructions
Grant 6,820,190 - Knebel , et al. November 16, 2
2004-11-16
Method and apparatus for efficiently generating, storing, and consuming arithmetic flags between producing and consuming macroinstructions when emulating with microinstructions
Grant 6,807,625 - Knebel , et al. October 19, 2
2004-10-19
Method and apparatus to reduce penalty of microcode lookup
Grant 6,789,186 - Brockmann , et al. September 7, 2
2004-09-07
Apparatus and method for conditionally flushing a pipeline upon a failure of a test condition
Grant 6,745,322 - Brockmann , et al. June 1, 2
2004-06-01
Method and apparatus for seeding differences in lock-stepped processors
App 20040078651 - Safford, Kevin David ;   et al.
2004-04-22
Method and apparatus for testing errors in microprocessors
App 20040078650 - Safford, Kevin David ;   et al.
2004-04-22
Method and apparatus for exchanging the contents of registers
App 20040068641 - Safford, Kevin David ;   et al.
2004-04-08
Method and apparatus for testing microarchitectural features by using tests written in microcode
App 20040064267 - Safford, Kevin David ;   et al.
2004-04-01
Method and apparatus for verifying the correctness of a processor behavioral model
App 20040039966 - Petsinger, Jeremy ;   et al.
2004-02-26
Apparatus and method for pseudorandom rare event injection to improve verification quality
App 20040034820 - Soltis,, Donald C. JR. ;   et al.
2004-02-19
Method and apparatus for implementing two architectures in a chip
App 20040030865 - Knebel, Patrick ;   et al.
2004-02-12
Detection of bit errors in maskable content addressable memories
App 20040015752 - Patella, Benjamin J. ;   et al.
2004-01-22
Detection of bit errors in content addressable memories
App 20040015753 - Patella, Benjamin J. ;   et al.
2004-01-22
Method and apparatus for emulating an instruction set extension in a digital computer system
Grant 6,681,322 - Safford , et al. January 20, 2
2004-01-20
Method and apparatus for recovery from loss of lock step
App 20040006722 - Safford, Kevin David
2004-01-08
Method and apparatus for communicating information between lock stepped processors
App 20040003021 - Safford, Kevin David ;   et al.
2004-01-01
Methods and apparatus for exchanging the contents of registers
Grant 6,668,315 - Safford , et al. December 23, 2
2003-12-23
Method and apparatus for testing microarchitectural features by using tests written in microcode
Grant 6,643,800 - Safford , et al. November 4, 2
2003-11-04
Method and apparatus for verifying the fine-grained correctness of a behavioral model of a central processor unit
Grant 6,625,759 - Petsinger , et al. September 23, 2
2003-09-23
Method and apparatus for implementing two architectures in a chip using bundles that contain microinstructions and template information
Grant 6,618,801 - Knebel , et al. September 9, 2
2003-09-09
Method and apparatus for re-creating the trace of an emulated instruction set when executed on hardware native to a different instruction set field
Grant 6,609,247 - Dua , et al. August 19, 2
2003-08-19
Determining register dependency in multiple architecture systems
Grant 6,542,862 - Safford , et al. April 1, 2
2003-04-01

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