Sadana; Devendra Kumar

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sadana; Devendra Kumar.The latest application filed is for "method for fabricating low-defect-density changed orientation si".

Company Profile

0.15.9

Sadana; Devendra Kumar - Pleasantville NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for fabricating low-defect-density changed orientation Si Grant 7,550,369 - de Souza , et al. June 23, 2	2009-06-23
Localized strain relaxation for strained Si directly on insulator Grant 7,524,740 - Liu , et al. April 28, 2	2009-04-28
Structure and method of integrating compound and elemental semiconductors for high-performance CMOS Grant 7,504,311 - Koester , et al. March 17, 2	2009-03-17
Control of buried oxide in SIMOX Grant 7,492,008 - Fox , et al. February 17, 2	2009-02-17
METHOD FOR FABRICATING LOW-DEFECT-DENSITY CHANGED ORIENTATION Si App 20080057684 - de Souza; Joel Pereira ; et al.	2008-03-06
Method for fabricating low-defect-density changed orientation Si Grant 7,285,473 - Pereira de Souza , et al. October 23, 2	2007-10-23
Structure and method of integrating compound and elemental semiconductors for high-performance CMOS Grant 7,282,425 - Koester , et al. October 16, 2	2007-10-16
Structure And Method Of Integrating Compound And Elemental Semiconductors For High-performance Cmos App 20070228484 - KOESTER; STEVEN JOHN ; et al.	2007-10-04
Structure and method of integrating compound and elemental semiconductors for high-performace CMOS App 20060172505 - Koester; Steven John ; et al.	2006-08-03
Method for fabricating low-defect-density changed orientation Si App 20060154429 - de Souza; Joel Pereira ; et al.	2006-07-13
Ultrathin buried insulators in Si or Si-containing material App 20060105559 - Chen; Tze-Chiang ; et al.	2006-05-18
Control of buried oxide in SIMOX App 20050003626 - Fox, Stephen Richard ; et al.	2005-01-06
Control of buried oxide in SIMOX Grant 6,784,072 - Fox , et al. August 31, 2	2004-08-31
Patterned SOI regions on semiconductor chips Grant 6,756,257 - Davari , et al. June 29, 2	2004-06-29
Control of buried oxide in SIMOX App 20040013886 - Fox, Stephen Richard ; et al.	2004-01-22
Patterned SOI regions on semiconductor chips App 20030104681 - Davari, Bijan ; et al.	2003-06-05
Double Soi Device With Recess Etch And Epitaxy App 20020115240 - Assaderaghi, Fariborz ; et al.	2002-08-22
Double SOI device with recess etch and epitaxy Grant 6,432,754 - Assaderaghi , et al. August 13, 2	2002-08-13
Patterned SOI regions in semiconductor chips Grant 6,333,532 - Davari , et al. December 25, 2	2001-12-25
Method for patterning a buried oxide thickness for a separation by implanted oxygen (simox) process Grant 6,300,218 - Cohen , et al. October 9, 2	2001-10-09
Defect induced buried oxide (DIBOX) for throughput SOI Grant 6,259,137 - Sadana , et al. July 10, 2	2001-07-10
Silicon-on-insulator substrates using low dose implantation Grant 6,043,166 - Roitman , et al. March 28, 2	2000-03-28
Defect induced buried oxide (DIBOX) for throughput SOI Grant 5,930,643 - Sadana , et al. July 27, 1	1999-07-27
SOI CMOS structure Grant 5,767,549 - Chen , et al. June 16, 1	1998-06-16

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