loadpatents
name:-0.054082155227661
name:-0.044528007507324
name:-0.00045108795166016
Sadaka; Mariam G. Patent Filings

Sadaka; Mariam G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sadaka; Mariam G..The latest application filed is for "modified hybrid orientation technology".

Company Profile
0.40.40
  • Sadaka; Mariam G. - Austin TX US
  • Sadaka; Mariam G. - Phoenix AZ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Isolation trench processing for strain control
Grant 8,440,539 - Sadaka , et al. May 14, 2
2013-05-14
Modified hybrid orientation technology
Grant 8,125,032 - Adetutu , et al. February 28, 2
2012-02-28
Method for making a semiconductor structure using silicon germanium
Grant 7,927,956 - Orlowski , et al. April 19, 2
2011-04-19
Electronic devices including a semiconductor layer
Grant 7,821,067 - Thean , et al. October 26, 2
2010-10-26
Method for forming a semiconductor structure having a strained silicon layer
Grant 7,811,382 - Sadaka , et al. October 12, 2
2010-10-12
Twisted dual-substrate orientation (DSO) substrates
Grant 7,803,670 - White , et al. September 28, 2
2010-09-28
Semiconductor device structure
Grant 7,781,840 - White , et al. August 24, 2
2010-08-24
Silicon deposition over dual surface orientation substrates to promote uniform polishing
Grant 7,754,587 - Spencer , et al. July 13, 2
2010-07-13
Integrated circuit with different channel materials for P and N channel transistors and method therefor
Grant 7,700,420 - Thean , et al. April 20, 2
2010-04-20
Method for forming a semiconductor structure and structure thereof
Grant 7,615,806 - Thean , et al. November 10, 2
2009-11-10
Modified Hybrid Orientation Technology
App 20090218625 - Adetutu; Olubunmi O. ;   et al.
2009-09-03
Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer
Grant 7,575,975 - Thean , et al. August 18, 2
2009-08-18
Inverse slope isolation and dual surface orientation integration
Grant 7,575,968 - Sadaka , et al. August 18, 2
2009-08-18
Process for forming an electronic device including semiconductor layers having different stresses
Grant 7,560,318 - Sadaka , et al. July 14, 2
2009-07-14
Trench liner for DSO integration
Grant 7,544,548 - Sadaka , et al. June 9, 2
2009-06-09
Modified hybrid orientation technology
Grant 7,524,707 - Adetutu , et al. April 28, 2
2009-04-28
Isolation Trench Processing For Strain Control
App 20090035914 - Sadaka; Mariam G. ;   et al.
2009-02-05
Inverse slope isolation and dual surface orientation integration
App 20080268587 - Sadaka; Mariam G. ;   et al.
2008-10-30
Dual surface SOI by lateral epitaxial overgrowth
Grant 7,435,639 - Winstead , et al. October 14, 2
2008-10-14
Process of forming an electronic device including a semiconductor island over an insulating layer
Grant 7,419,866 - Sadaka , et al. September 2, 2
2008-09-02
Method of making a multiple crystal orientation semiconductor device
Grant 7,402,477 - Sadaka , et al. July 22, 2
2008-07-22
Selective silicon deposition for planarized dual surface orientation integration
Grant 7,378,306 - Spencer , et al. May 27, 2
2008-05-27
Twisted Dual-Substrate Orientation (DSO) Substrates
App 20080020515 - White; Ted R. ;   et al.
2008-01-24
Dual surface SOI by lateral epitaxial overgrowth
App 20070281446 - Winstead; Brian A. ;   et al.
2007-12-06
Method For Forming A Semiconductor Structure Having A Strained Silicon Layer
App 20070277728 - Sadaka; Mariam G. ;   et al.
2007-12-06
Trench liner for DSO integration
App 20070281436 - Sadaka; Mariam G. ;   et al.
2007-12-06
Electronic Devices Including A Semiconductor Layer
App 20070272952 - Thean; Voon-Yew ;   et al.
2007-11-29
Method to selectively form regions having differing properties and structure
Grant 7,285,452 - Sadaka , et al. October 23, 2
2007-10-23
Integrated circuit with different channel materials for P and N channel transistors and method therefor
App 20070241403 - Thean; Voon-Yew ;   et al.
2007-10-18
Method of making a dual strained channel semiconductor device
Grant 7,282,402 - Sadaka , et al. October 16, 2
2007-10-16
Semiconductor Device Structure And Method Therefor
App 20070235807 - White; Ted R. ;   et al.
2007-10-11
Method of making a multiple crystal orientation semiconductor device
App 20070238233 - Sadaka; Mariam G. ;   et al.
2007-10-11
Selective silicon deposition for planarized dual surface orientation integration
App 20070218659 - Spencer; Gregory S. ;   et al.
2007-09-20
Electronic device including semiconductor islands of different thicknesses over an insulating layer and a process of forming the same
App 20070218707 - Sadaka; Mariam G. ;   et al.
2007-09-20
Silicon deposition over dual surface orientation substrates to promote uniform polishing
App 20070218654 - Spencer; Gregory S. ;   et al.
2007-09-20
Electronic device and a process for forming the electronic device
App 20070210381 - Sadaka; Mariam G. ;   et al.
2007-09-13
Electronic devices including a semiconductor layer and a process for forming the same
Grant 7,265,004 - Thean , et al. September 4, 2
2007-09-04
Method to selectively form regions having differing properties and structure
App 20070190745 - Sadaka; Mariam G. ;   et al.
2007-08-16
Graded semiconductor layer
Grant 7,241,647 - Sadaka , et al. July 10, 2
2007-07-10
Semiconductor device structure and method therefor
Grant 7,226,833 - White , et al. June 5, 2
2007-06-05
Electronic devices including a semiconductor layer and a process for forming the same
App 20070108481 - Thean; Voon-Yew ;   et al.
2007-05-17
Method for forming a semiconductor structure and structure thereof
App 20070099353 - Thean; Voon-Yew ;   et al.
2007-05-03
Method for forming a semiconductor structure and structure thereof
App 20070099361 - Thean; Voon-Yew ;   et al.
2007-05-03
Template layer formation
Grant 7,208,357 - Sadaka , et al. April 24, 2
2007-04-24
Semiconductor structure having strained semiconductor and method therefor
Grant 7,205,210 - Barr , et al. April 17, 2
2007-04-17
Method For Making A Semiconductor Structure Using Silicon Germanium
App 20070082453 - Orlowski; Marius K. ;   et al.
2007-04-12
Modified hybrid orientation technology
App 20070048919 - Adetutu; Olubunmi O. ;   et al.
2007-03-01
Method for making a semiconductor structure using silicon germanium
Grant 7,163,903 - Orlowski , et al. January 16, 2
2007-01-16
Channel orientation to enhance transistor performance
Grant 7,160,769 - White , et al. January 9, 2
2007-01-09
Semiconductor device featuring an arched structure strained semiconductor layer
App 20060226492 - Nguyen; Bich-Yen ;   et al.
2006-10-12
Method of making a dual strained channel semiconductor device
App 20060228851 - Sadaka; Mariam G. ;   et al.
2006-10-12
Method of making a semiconductor device having an arched structure strained semiconductor layer
App 20060228872 - Nguyen; Bich-Yen ;   et al.
2006-10-12
Double gate device having a heterojunction source/drain and strained channel
Grant 7,067,868 - Thean , et al. June 27, 2
2006-06-27
Semiconductor layer formation
Grant 7,056,778 - Liu , et al. June 6, 2
2006-06-06
Semiconductor device structure and method therefor
App 20060094169 - White; Ted R. ;   et al.
2006-05-04
Low RC product transistors in SOI semiconductor process
Grant 7,037,795 - Barr , et al. May 2, 2
2006-05-02
Channel orientation to enhance transistor performance
App 20060084207 - White; Ted R. ;   et al.
2006-04-20
Low Rc Product Transistors In Soi Semiconductor Process
App 20060084235 - Barr; Alexander L. ;   et al.
2006-04-20
Method of manufacturing SOI template layer
Grant 7,029,980 - Liu , et al. April 18, 2
2006-04-18
Method For Forming A Semiconductor Device Having A Strained Channel And A Heterojunction Source/drain
App 20060068553 - Thean; Voon-Yew ;   et al.
2006-03-30
Double gate device having a heterojunction source/drain and strained channel
App 20060065927 - Thean; Voon-Yew ;   et al.
2006-03-30
Method for forming a semiconductor device having a strained channel and a heterojunction source/drain
Grant 7,018,901 - Thean , et al. March 28, 2
2006-03-28
Graded semiconductor layer
App 20060040433 - Sadaka; Mariam G. ;   et al.
2006-02-23
Strained semiconductor devices and method for forming at least a portion thereof
App 20060030093 - Zhang; Da ;   et al.
2006-02-09
Method for making a semiconductor structure using silicon germanium
App 20050245092 - Orlowski, Marius K. ;   et al.
2005-11-03
Semiconductor structure having strained semiconductor and method therefor
App 20050181549 - Barr, Alexander L. ;   et al.
2005-08-18
Heterojunction bipolar transistor with monolithically integrated junction field effect transistor and method of manufacturing same
Grant 6,919,590 - Hill , et al. July 19, 2
2005-07-19
Advanced RF enhancement-mode FETs with improved gate properties
Grant 6,893,947 - Martinez , et al. May 17, 2
2005-05-17
SOI template layer
App 20050070056 - Liu, Chun-Li ;   et al.
2005-03-31
Template layer formation
App 20050070053 - Sadaka, Mariam G. ;   et al.
2005-03-31
Semiconductor layer formation
App 20050070057 - Liu, Chun-Li ;   et al.
2005-03-31
Semiconductor component and method of manufacturing same
App 20050045911 - Hill, Darrell ;   et al.
2005-03-03
Method of manufacturing a semiconductor component and semiconductor component thereof
Grant 6,855,965 - Hill , et al. February 15, 2
2005-02-15
Chemistry for etching quaternary interface layers on InGaAsP mostly formed between GaAs and InxGa(1-x)P layers
Grant 6,803,248 - Sadaka , et al. October 12, 2
2004-10-12
Advanced RF enhancement-mode FETs with improved gate properties
App 20030235974 - Martinez, Marino J. ;   et al.
2003-12-25
Chemistry for etching quaternary interface layers on InGaAsP mostly formed between GaAs and InxGa(1-x)P layers
App 20030138984 - Sadaka, Mariam G. ;   et al.
2003-07-24
Method of manufacturing a semiconductor component having a capacitor
Grant 6,465,297 - Henry , et al. October 15, 2
2002-10-15
Method of manufacturing a semiconductor component and semiconductor component thereof
App 20020053683 - Hill, Darrell G. ;   et al.
2002-05-09
Method of manufacturing a semiconductor component and semiconductor component thereof
Grant 6,368,929 - Hill , et al. April 9, 2
2002-04-09

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