Ryan; Vivian

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ryan; Vivian.The latest application filed is for "combinatorial screening of metallic diffusion barriers".

Company Profile

0.21.17

Ryan; Vivian - Berne NY
Ryan; Vivian - Hampton NJ US
Ryan; Vivian - Washington NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Combinatorial screening of metallic diffusion barriers Grant 9,297,775 - Adhiprakasha , et al. March 29, 2	2016-03-29
Combinatorial screening of metallic diffusion barriers App 20150338362 - Adhiprakasha; Edwin ; et al.	2015-11-26
Mixed-metal barrier films optimized by high-productivity combinatorial PVD App 20150021772 - Adhiprakasha; Edwin ; et al.	2015-01-22
Integrated circuit with heat conducting structures for localized thermal control Grant 8,664,759 - Ryan March 4, 2	2014-03-04
Thermal monitoring and management of integrated circuits Grant 7,973,544 - Archer, III , et al. July 5, 2	2011-07-05
On-chip sensor array for temperature management in integrated circuits Grant 7,800,879 - Ryan September 21, 2	2010-09-21
Heat sink formed of multiple metal layers on backside of integrated circuit die Grant 7,745,927 - Ryan , et al. June 29, 2	2010-06-29
Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit Grant 7,705,473 - Lian , et al. April 27, 2	2010-04-27
Thermal Monitoring And Management Of Integrated Circuits App 20100045326 - Archer, III; Vance D. ; et al.	2010-02-25
Lateral double diffused MOS transistors Grant 7,573,097 - Desko , et al. August 11, 2	2009-08-11
Integrated circuit having bond pad with improved thermal and mechanical properties Grant 7,504,728 - Ryan March 17, 2	2009-03-17
Integrated circuit device incorporating metallurgical bond to enhance thermal conduction to a heat sink Grant 7,429,502 - Archer, III , et al. September 30, 2	2008-09-30
Metallization performance in electronic devices Grant 7,339,274 - Desko, Jr. , et al. March 4, 2	2008-03-04
Integrated circuit device incorporating metallurigical bond to enhance thermal conduction to a heat sink Grant 7,327,029 - Archer, III , et al. February 5, 2	2008-02-05
On-Chip Sensor Array for Temperature Management in Integrated Circuits App 20080026503 - Ryan; Vivian	2008-01-31
Integrated Circuit Device Incorporating Metallurgical Bond to Enhance Thermal Conduction to a Heat Sink App 20080026508 - Archer; Vance D. III ; et al.	2008-01-31
Integrated circuit having bond pad with improved thermal and mechanical properties App 20070134903 - Ryan; Vivian	2007-06-14
Integrated circuit device incorporating metallurigacal bond to enhance thermal conduction to a heat sink App 20070069368 - Archer; Vance D. III ; et al.	2007-03-29
Semiconductor device having a dummy conductive via and a method of manufacture therefor Grant 7,157,365 - Ryan January 2, 2	2007-01-02
Integrated circuit with heat conducting structures for localized thermal control App 20060289988 - Ryan; Vivian	2006-12-28
Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit App 20060157871 - Lian; Sean ; et al.	2006-07-20
Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit Grant 7,056,819 - Lian , et al. June 6, 2	2006-06-06
Lateral double diffused MOS transistors App 20060091480 - Desko; John C. ; et al.	2006-05-04
Metallization performance in electronic devices App 20060038294 - Desko; John C. JR. ; et al.	2006-02-23
Heat sink formed of multiple metal layers on backside of integrated circuit die App 20050287952 - Ryan, Vivian ; et al.	2005-12-29
Semiconductor device having a dummy conductive via and a method of manufacture therefor App 20050248033 - Ryan, Vivian	2005-11-10
Methods and apparatus for the detection of damaged regions on dielectric film or other portions of a die Grant 6,919,228 - Lian , et al. July 19, 2	2005-07-19
Methods And Apparatus For The Detection Of Damaged Regions On Dielectric Film Or Other Portions Of A Die App 20050092987 - Lian, Sean ; et al.	2005-05-05
Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit App 20050067678 - Lian, Sean ; et al.	2005-03-31
Stress migration test structure and method therefor Grant 6,747,445 - Fetterman , et al. June 8, 2	2004-06-08
Integrated circuit having stress migration test structure and method therefor Grant 6,683,465 - Fetterman , et al. January 27, 2	2004-01-27
Stress migration test structure and method therefor App 20030082836 - Fetterman, H. Scott ; et al.	2003-05-01
Integrated circuit having stress migration test structure and method therefor App 20030080766 - Fetterman, H. Scott ; et al.	2003-05-01
Bond pad design for integrated circuits Grant 6,207,547 - Chittipeddi , et al. March 27, 2	2001-03-27
Bond pad for a flip chip package, and method of forming the same Grant 6,187,658 - Chittipeddi , et al. February 13, 2	2001-02-13
Bond pad for a flip-chip package Grant 6,087,732 - Chittipeddi , et al. July 11, 2	2000-07-11
Bond pad design for integrated circuits Grant 5,986,343 - Chittipeddi , et al. November 16, 1	1999-11-16

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