Russell; David John

Patent Applications and Registrations

Patent applications and USPTO patent grants for Russell; David John.The latest application filed is for "copper feature design for warpage control of substrates".

Company Profile

0.22.9

Russell; David John - Oswego NY
Russell; David John - Owego NY US
Russell; David John - Apalachin NY
Russell; David John - Heidelberg AU

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Copper feature design for warpage control of substrates Grant 9,659,131 - Blackshear , et al. May 23, 2	2017-05-23
Copper Feature Design for Warpage Control of Substrates App 20150317423 - Blackshear; Edmund ; et al.	2015-11-05
Copper feature design for warpage control of substrates Grant 9,105,535 - Blackshear , et al. August 11, 2	2015-08-11
Method for forming coreless flip chip ball grid array (FCBGA) substrates and such substrates formed by the method Grant 8,841,209 - Allard , et al. September 23, 2	2014-09-23
Copper Feature Design for Warpage Control of Substrates App 20130334711 - Blackshear; Edmund ; et al.	2013-12-19
Electrical contact alignment posts Grant 8,530,345 - West , et al. September 10, 2	2013-09-10
Electrical Contact Alignment Posts App 20130157455 - West; David Justin ; et al.	2013-06-20
Electrical contact alignment posts Grant 8,415,792 - West , et al. April 9, 2	2013-04-09
Method For Forming Coreless Flip Chip Ball Grid Array (fcbga) Substrates And Such Substrates Formed By The Method App 20130043060 - Allard; Sylvie ; et al.	2013-02-21
Photoimaged dielectric polymer and film, and circuit package containing the same Grant 7,118,837 - Jakubek , et al. October 10, 2	2006-10-10
Photoimaged dielectric polymer and film, and circuit package containing the same App 20050106504 - Jakubek, Vladimir ; et al.	2005-05-19
Photoimaged dielectric, its manufacture and use in electronics Grant 6,806,033 - Jakubek , et al. October 19, 2	2004-10-19
Circuitized structures produced by the methods of electroless plating Grant 6,680,440 - Russell , et al. January 20, 2	2004-01-20
Photoimagable dielectric, its manufacture and use in electronics App 20030165771 - Jakubek, Vladimir ; et al.	2003-09-04
Composition for photoimaging App 20020177072 - Day, Richard Allen ; et al.	2002-11-28
Composition for photoimaging Grant 6,210,862 - Day , et al. April 3, 2	2001-04-03
Information handling system with circuit assembly having holes filled with filler material Grant 6,178,093 - Bhatt , et al. January 23, 2	2001-01-23
Process for high resolution photoimageable dielectric Grant 6,022,670 - Russell , et al. February 8, 2	2000-02-08
Process for manufacturing a circuit with filled holes Grant 6,000,129 - Bhatt , et al. December 14, 1	1999-12-14
Process for high resolution photoimageable dielectric Grant 5,993,945 - Russell , et al. November 30, 1	1999-11-30
Method for manufacturing a high density electronic circuit assembly Grant 5,985,760 - Lauffer , et al. November 16, 1	1999-11-16
Apparatus and process for improved die adhesion to organic chip carriers Grant 5,955,782 - Kosteva , et al. September 21, 1	1999-09-21
Modular circuit package having vertically aligned power and signal cores Grant 5,876,842 - Duffy , et al. March 2, 1	1999-03-02
Electric circuit card having a donut shaped land Grant 5,670,750 - Lauffer , et al. September 23, 1	1997-09-23
Method for manufacturing a high density electronic circuit assembly Grant 5,665,650 - Lauffer , et al. September 9, 1	1997-09-09
Arrangement for preventing interruptions in a time division multiplex transmission link for transfer of data Grant 3,940,566 - Jeppsson , et al. February 24, 1	1976-02-24

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.