loadpatents
name:-0.016936063766479
name:-0.0092871189117432
name:-0.00055503845214844
Ruf; Bernhard Patent Filings

Ruf; Bernhard

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ruf; Bernhard.The latest application filed is for "integrated circuit".

Company Profile
0.8.14
  • Ruf; Bernhard - Sauerlach DE
  • Ruf; Bernhard - Taufkirchen DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated circuit
Grant 8,063,394 - Andres , et al. November 22, 2
2011-11-22
Method for fabricating an integrated circuit including memory element with spatially stable material
Grant 8,009,468 - Andres , et al. August 30, 2
2011-08-30
Integrated circuit including memory element with spatially stable material
Grant 7,939,817 - Andres , et al. May 10, 2
2011-05-10
Integrated circuit including a memory element programmed using a seed pulse
Grant 7,929,336 - Philipp , et al. April 19, 2
2011-04-19
Device and method for electrical contacting semiconductor devices for testing
Grant 7,852,095 - Ruf December 14, 2
2010-12-14
Integrated Circuit
App 20100084741 - Andres; Dieter ;   et al.
2010-04-08
Integrated circuit for setting a memory cell based on a reset current distribution
Grant 7,646,632 - Philipp , et al. January 12, 2
2010-01-12
Integrated Circuit Including A Memory Element Programmed Using A Seed Pulse
App 20090310401 - Philipp; Jan Boris ;   et al.
2009-12-17
System and Method For Modifying Signal Characteristics
App 20090295443 - Ruf; Bernhard ;   et al.
2009-12-03
Integrated Circuit For Setting A Memory Cell Based On A Reset Current Distribution
App 20090161415 - Philipp; Jan Boris ;   et al.
2009-06-25
Integrated Circuit Including Memory Element With Spatially Stable Material
App 20090050870 - Andres; Dieter ;   et al.
2009-02-26
Method For Fabricating An Integrated Circuit Including Memory Element With Spatially Stable Material
App 20090052232 - Andres; Dieter ;   et al.
2009-02-26
Integrated Circuit, Memory Module, Method of Operating an Integrated Circuit, Method of Fabricating an Integrated Circuit, Computer Program Product, and Computing System
App 20080263415 - Ruf; Bernhard ;   et al.
2008-10-23
Integrated Circuit, Memory Module, Method of Operating an Integrated Circuit, Method of Manufacturing an Integrated Circuit, and Computer Program Product
App 20080259676 - Ruf; Bernhard ;   et al.
2008-10-23
Integrated circuit, memory cell array, memory module, method of operating an integrated circuit, and computing system
App 20080247217 - Ruf; Bernhard
2008-10-09
Device And Method For Electrical Contacting Semiconductor Devices For Testing
App 20080231295 - Ruf; Bernhard
2008-09-25
Semiconductor Device For Electrical Contacting Semiconductor Devices
App 20080231303 - Kallscheuer; Jochen ;   et al.
2008-09-25
Memory device and method for transforming between non-power-of-2 levels of multilevel memory cells and 2-level data bits
Grant 7,420,841 - Ruf , et al. September 2, 2
2008-09-02
Memory Device and Method of Operating a Memory Device
App 20080055987 - Ruf; Bernhard ;   et al.
2008-03-06
Method and arrangement for repairing memory chips using microlithography methods
App 20070066367 - Kallscheuer; Jochen ;   et al.
2007-03-22
Integrated circuit, test structure and method for testing integrated circuits
Grant 6,618,303 - Gruber , et al. September 9, 2
2003-09-09
Integrated circuit, test structure and method for testing integrated circuits
App 20020020854 - Gruber, Arndt ;   et al.
2002-02-21

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed