Rozhkov; Sergey A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rozhkov; Sergey A..The latest application filed is for "apparatus and methods to support counted loop exits in a multi-strand loop processor".

Company Profile

5.9.14

Rozhkov; Sergey A. - Santa Clara CA
Rozhkov; Sergey A. - San Jose CA
Rozhkov; Sergey A. - Moscow RU
Rozhkov; Sergey A. - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Instructions for manipulating a multi-bit predicate register for predicating instruction sequences Grant 10,579,378 - Grochowski , et al.	2020-03-03
Method to do control speculation on loads in a high performance strand-based loop accelerator Grant 10,241,789 - Ostanevich , et al.	2019-03-26
Method and apparatus to create register windows for parallel iterations to achieve high performance in HW-SW codesigned loop accelerator Grant 10,241,801 - Iyer , et al.	2019-03-26
Apparatus and methods to support counted loop exits in a multi-strand loop processor Grant 10,241,794 - Scherbinin , et al.	2019-03-26
Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processor Grant 10,235,171 - Ostanevich , et al.	2019-03-19
Apparatus And Methods To Support Counted Loop Exits In A Multi-strand Loop Processor App 20180181400 - Scherbinin; Sergey P. ; et al.	2018-06-28
Apparatus And Methods Of Decomposing Loops To Improve Performance And Power Efficiency App 20180181398 - Scherbinin; Sergey P. ; et al.	2018-06-28
Method And Apparatus To Create Register Windows For Parallel Iterations To Achieve High Performance In Hw-sw Codesigned Loop Accelerator App 20180181405 - IYER; Jayesh ; et al.	2018-06-28
Method And Apparatus To Efficiently Handle Allocation Of Memory Ordering Buffers In A Multi-strand Out-of-order Loop Processor App 20180181397 - OSTANEVICH; Alexander Y. ; et al.	2018-06-28
Method To Do Control Speculation On Loads In A High Performance Strand-based Loop Accelerator App 20180181396 - OSTANEVICH; Alexander Y. ; et al.	2018-06-28
Hardware-assisted Software Verification And Secure Execution App 20170090929 - Muttik; Igor ; et al.	2017-03-30
Method And Apparatus For Non-speculative Fetch And Execution Of Control-dependent Blocks App 20160055004 - GROCHOWSKI; EDWARD T. ; et al.	2016-02-25
Method And Apparatus For Executing Instructions Using A Predicate Register App 20150277910 - GROCHOWSKI; EDWARD T. ; et al.	2015-10-01
Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution Grant 8,261,250 - Babaian , et al. September 4, 2	2012-09-04
Single-chip Multiprocessor With Clock Cycle-precise Program Scheduling Of Parallel Execution App 20110107067 - Babaian; Boris A. ; et al.	2011-05-05
Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution Grant 7,895,587 - Babaian , et al. February 22, 2	2011-02-22
Systems, Methods, And Apparatuses For Parallel Computing App 20100274972 - Babayan; Boris ; et al.	2010-10-28
Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution App 20070006193 - Babaian; Boris A. ; et al.	2007-01-04
Single-chip multiprocessor with cycle-precise program scheduling of parallel execution Grant 7,143,401 - Babaian , et al. November 28, 2	2006-11-28
Method and apparatus for preserving precise exceptions in binary translated code Grant 7,065,750 - Babaian , et al. June 20, 2	2006-06-20
Method and apparatus for preserving precise exceptions in binary translated code App 20020092002 - Babaian, Boris A. ; et al.	2002-07-11
Single-chip multiprocessor with cycle-precise program scheduling of parallel execution App 20010042189 - Babaian, Boris A. ; et al.	2001-11-15

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