loadpatents
Patent applications and USPTO patent grants for Royer; Robert.The latest application filed is for "nand power fail recovery".
Patent | Date |
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Method and system for queuing transfers of multiple non-contiguous address ranges with a single command Grant 9,128,699 - Royer , et al. September 8, 2 | 2015-09-08 |
Encrypting data on a non-volatile memory Grant 8,555,086 - Royer , et al. October 8, 2 | 2013-10-08 |
NAND power fail recovery Grant 8,316,257 - Royer , et al. November 20, 2 | 2012-11-20 |
Hybrid memory device Grant 8,239,613 - Trika , et al. August 7, 2 | 2012-08-07 |
Wrap-around sequence numbers for recovering from power-fall in non-volatile memory Grant 8,171,205 - Royer , et al. May 1, 2 | 2012-05-01 |
Nand Power Fail Recovery App 20110258487 - Royer; Robert ;   et al. | 2011-10-20 |
NAND power fail recovery Grant 7,941,692 - Royer , et al. May 10, 2 | 2011-05-10 |
Hybrid Memory Device App 20100169604 - Trika; Sanjeev N. ;   et al. | 2010-07-01 |
Method And System For Queuing Transfers Of Multiple Non-contiguous Address Ranges With A Single Command App 20100161936 - ROYER; ROBERT ;   et al. | 2010-06-24 |
NAND error management App 20090327837 - Royer; Robert ;   et al. | 2009-12-31 |
Encrypting data on a non-volatile memory App 20090327759 - Royer; Robert ;   et al. | 2009-12-31 |
Wrap-around sequence numbers for recovering from power-fall in non-volatile memory App 20090276586 - Royer; Robert ;   et al. | 2009-11-05 |
NAND power fail recovery App 20090172466 - Royer; Robert ;   et al. | 2009-07-02 |
Abstracted dynamic addressing App 20060294339 - Trika; Sanjeev N. ;   et al. | 2006-12-28 |
Nesting tray with stacking keyed interlock Grant 4,379,508 - Miller , et al. April 12, 1 | 1983-04-12 |
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