loadpatents
Patent applications and USPTO patent grants for Rowlands; Joseph Byron.The latest application filed is for "symbolic renaming optimization of a trace".
Patent | Date |
---|---|
Symbolic renaming optimization of a trace Grant 8,499,293 - Ashcraft , et al. July 30, 2 | 2013-07-30 |
Data cache rollbacks for failed speculative traces with memory operations Grant 8,370,609 - Favor , et al. February 5, 2 | 2013-02-05 |
Cache rollback acceleration via a bank based versioning cache ciruit Grant 8,370,576 - Favor , et al. February 5, 2 | 2013-02-05 |
Trace based deallocation of entries in a versioning cache circuit Grant 8,051,247 - Favor , et al. November 1, 2 | 2011-11-01 |
Trace unit Grant 8,037,285 - Thaik , et al. October 11, 2 | 2011-10-11 |
Memory ordering queue/versioning cache circuit Grant 8,024,522 - Favor , et al. September 20, 2 | 2011-09-20 |
Checking for a memory ordering violation after a speculative cache write Grant 8,019,944 - Favor , et al. September 13, 2 | 2011-09-13 |
Rolling back a speculative update of a non-modifiable cache line Grant 8,010,745 - Favor , et al. August 30, 2 | 2011-08-30 |
Trace unit with a decoder, a basic-block cache, a multi-block cache, and sequencer Grant 7,987,342 - Thaik , et al. July 26, 2 | 2011-07-26 |
Concurrent vs. low power branch prediction Grant 7,966,479 - Thaik , et al. June 21, 2 | 2011-06-21 |
Instruction cache, decoder circuit, basic block cache circuit and multi-block cache circuit Grant 7,953,933 - Thaik , et al. May 31, 2 | 2011-05-31 |
Trace unit with an op path from a decoder (bypass mode) and from a basic-block builder Grant 7,953,961 - Thaik , et al. May 31, 2 | 2011-05-31 |
Trace unit with a trace builder Grant 7,949,854 - Thaik , et al. May 24, 2 | 2011-05-24 |
Emit vector optimization of a trace Grant 7,937,564 - Ashcraft , et al. May 3, 2 | 2011-05-03 |
Trace based rollback of a speculatively updated cache Grant 7,877,630 - Favor , et al. January 25, 2 | 2011-01-25 |
Flag optimization of a trace Grant 7,849,292 - Ashcraft , et al. December 7, 2 | 2010-12-07 |
Memory ordering queue tightly coupled with a versioning cache circuit Grant 7,779,307 - Favor , et al. August 17, 2 | 2010-08-17 |
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