Patent | Date |
---|
Enhanced page locality in network-on-chip (NoC) architectures Grant 11,144,457 - Rowlands , et al. October 12, 2 | 2021-10-12 |
Bandwidth weighting mechanism based network-on-chip (NoC) configuration Grant 10,983,910 - Rowlands , et al. April 20, 2 | 2021-04-20 |
Interface virtualization and fast path for Network on Chip Grant 10,749,811 - Rowlands , et al. A | 2020-08-18 |
Interface virtualization and fast path for network on chip Grant 10,735,335 - Rowlands , et al. | 2020-08-04 |
Enhanced Page Locality In Network-on-chip (noc) Architectures App 20190258572 - ROWLANDS; Joseph ;   et al. | 2019-08-22 |
Systems And Methods For Maintaining Network-on-chip (noc) Safety And Reliability App 20190260504 - Philip; Joji ;   et al. | 2019-08-22 |
Bandwidth Weighting Mechanism Based Network-on-chip (noc) Configuration App 20190258573 - ROWLANDS; Joseph ;   et al. | 2019-08-22 |
Multiple clock domains in NoC Grant 10,027,433 - Philip , et al. July 17, 2 | 2018-07-17 |
Interface Virtualization And Fast Path For Network On Chip App 20180191626 - ROWLANDS; Joseph ;   et al. | 2018-07-05 |
Interface Virtualization And Fast Path For Network On Chip App 20180183721 - ROWLANDS; Joseph ;   et al. | 2018-06-28 |
Interface Virtualization And Fast Path For Network On Chip App 20180183722 - ROWLANDS; Joseph ;   et al. | 2018-06-28 |
Interface Virtualization And Fast Path For Network On Chip App 20180159786 - Rowlands; Joseph ;   et al. | 2018-06-07 |
Identification of internal dependencies within system components for evaluating potential protocol level deadlocks Grant 9,781,043 - Kumar , et al. October 3, 2 | 2017-10-03 |
Hierarchical asymmetric mesh with virtual routers Grant 9,774,498 - Kumar , et al. September 26, 2 | 2017-09-26 |
Hierarchical Asymmetric Mesh With Virtual Routers App 20170063610 - KUMAR; Sailesh ;   et al. | 2017-03-02 |
Page crossing prefetches Grant 9,563,562 - Rowlands , et al. February 7, 2 | 2017-02-07 |
Hierarchical asymmetric mesh with virtual routers Grant 9,253,085 - Kumar , et al. February 2, 2 | 2016-02-02 |
Tagging and synchronization for fairness in NOC interconnects Grant 9,185,026 - Kumar , et al. November 10, 2 | 2015-11-10 |
Creating multiple NoC layers for isolation or avoiding NoC traffic congestion Grant 9,130,856 - Kumar , et al. September 8, 2 | 2015-09-08 |
QoS in heterogeneous NoC by assigning weights to NoC node channels and using weighted arbitration at NoC nodes Grant 9,007,920 - Kumar , et al. April 14, 2 | 2015-04-14 |
Automatic deadlock detection and avoidance in a system interconnect by capturing internal dependencies of IP cores using high level specification Grant 9,009,648 - Kumar , et al. April 14, 2 | 2015-04-14 |
Identification Of Internal Dependencies Within System Components For Evaluating Potential Protocol Level Deadlocks App 20150016257 - KUMAR; Sailesh ;   et al. | 2015-01-15 |
Multiple Clock Domains In Noc App 20140376569 - PHILIP; Joji ;   et al. | 2014-12-25 |
Creating Multiple Noc Layers For Isolation Or Avoiding Noc Traffic Congestion App 20140211622 - Kumar; Sailesh ;   et al. | 2014-07-31 |
Qos In Heterogeneous Noc By Assigning Weights To Noc Node Channels And Using Weighted Arbitration At Noc Nodes App 20140204764 - KUMAR; Sailesh ;   et al. | 2014-07-24 |
Automatic Deadlock Detection And Avoidance In A System Interconnect By Capturing Internal Dependencies Of Ip Cores Using High Level Specification App 20140204735 - KUMAR; Sailesh ;   et al. | 2014-07-24 |
Hierarchical Asymmetric Mesh With Virtual Routers App 20140177473 - KUMAR; Sailesh ;   et al. | 2014-06-26 |
Tagging And Synchronization For Fairness In Noc Interconnects App 20140177648 - KUMAR; Sailesh ;   et al. | 2014-06-26 |
Page Crossing Prefetches App 20140149679 - Rowlands; Joseph ;   et al. | 2014-05-29 |
Virtual core management Grant 8,225,315 - Cheng , et al. July 17, 2 | 2012-07-17 |
System and method for ensuring coherency in trace execution Grant 8,032,710 - Ashcraft , et al. October 4, 2 | 2011-10-04 |
Method and system for utilizing a common structure for trace verification and maintaining coherency in an instruction processing circuit Grant 8,015,359 - Favor , et al. September 6, 2 | 2011-09-06 |
Method and system for promoting traces in an instruction processing circuit Grant 7,941,607 - Thaik , et al. May 10, 2 | 2011-05-10 |
Promoting and appending traces in an instruction processing circuit based upon a bias value Grant 7,814,298 - Thaik , et al. October 12, 2 | 2010-10-12 |
System and method for conserving power Grant 7,797,563 - Moll , et al. September 14, 2 | 2010-09-14 |