loadpatents
name:-0.069435834884644
name:-0.24031209945679
name:-0.00528883934021
Rotondaro; Antonio L. P. Patent Filings

Rotondaro; Antonio L. P.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rotondaro; Antonio L. P..The latest application filed is for "colloidal silica growth inhibitor and associated method and system".

Company Profile
6.49.54
  • Rotondaro; Antonio L. P. - Austin TX
  • Rotondaro; Antonio L. P. - Wappingers Falls NY
  • Rotondaro; Antonio L. P. - Hopewell Junction NY US
  • Rotondaro; Antonio L. P. - Beacon NY US
  • Rotondaro; Antonio L. P. - Dallas TX
  • ROTONDARO; ANTONIO L.P. - Bealon NY
  • Rotondaro; Antonio L.P - Dallas TX
  • Rotondaro; Antonio L. P. - Plano TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Process and apparatus for processing a nitride structure without silica deposition
Grant 10,916,440 - Bassett , et al. February 9, 2
2021-02-09
Colloidal silica growth inhibitor and associated method and system
Grant 10,763,120 - Rotondaro , et al. Sep
2020-09-01
Process and apparatus for processing a nitride structure without silica deposition
Grant 10,515,820 - Bassett , et al. Dec
2019-12-24
Colloidal Silica Growth Inhibitor And Associated Method And System
App 20190237338 - Rotondaro; Antonio L.P. ;   et al.
2019-08-01
Process And Apparatus For Processing A Nitride Structure Without Silica Deposition
App 20190237339 - Bassett; Derek ;   et al.
2019-08-01
Colloidal silica growth inhibitor and associated method and system
Grant 10,325,779 - Rotondaro , et al.
2019-06-18
Colloidal Silica Growth Inhibitor and Associated Method and System
App 20170287725 - Rotondaro; Antonio L.P. ;   et al.
2017-10-05
Process and Apparatus for Processing a Nitride Structure Without Silica Deposition
App 20170287726 - Bassett; Derek ;   et al.
2017-10-05
Body contacted transistor with reduced parasitic capacitance
Grant 9,269,783 - Rotondaro February 23, 2
2016-02-23
Body contacted transistor with reduced parasitic capacitance
Grant 8,441,071 - Rotondaro May 14, 2
2013-05-14
Selectively self-assembling oxygen diffusion barrier
Grant 8,410,559 - Li , et al. April 2, 2
2013-04-02
Body Contacted Transistor With Reduced Parasitic Capacitance
App 20120171841 - Rotondaro; Antonio L. P.
2012-07-05
Gate structure and method
Grant 8,021,990 - Rotondaro , et al. September 20, 2
2011-09-20
Body Contacted Transistor With Reduced Parasitic Capacitance
App 20110163382 - Rotondaro; Antonio L. P.
2011-07-07
Selectively Self-assembling Oxygen Diffusion Barrier
App 20100237442 - LI; ZHENGWEN ;   et al.
2010-09-23
Semiconductor device manufactured using a laminated stress layer
Grant 7,611,939 - Mehrotra , et al. November 3, 2
2009-11-03
Gate Structure And Method
App 20090227117 - Rotondaro; Antonio L.P. ;   et al.
2009-09-10
Gate structure and method
Grant 7,535,066 - Rotondaro , et al. May 19, 2
2009-05-19
Semiconductor Device Manufactured Using a Laminated Stress Layer
App 20080277730 - Mehrotra; Manoj ;   et al.
2008-11-13
Gate dielectric and method
Grant 7,449,385 - Rotondaro , et al. November 11, 2
2008-11-11
Method and system for forming dual work function gate electrodes in a semiconductor device
Grant 7,432,566 - Rotondaro , et al. October 7, 2
2008-10-07
Integrated circuits with composite gate dielectric
Grant 7,423,326 - Rotondaro , et al. September 9, 2
2008-09-09
Multi-step process for patterning a metal gate electrode
Grant 7,422,969 - Rotondaro , et al. September 9, 2
2008-09-09
Method for controlling defects in gate dielectrics
Grant 7,351,626 - Colombo , et al. April 1, 2
2008-04-01
Defect Control in Gate Dielectrics
App 20080057739 - Colombo; Luigi ;   et al.
2008-03-06
Multi-step process for patterning a metal gate electrode
Grant 7,323,403 - Rotondaro , et al. January 29, 2
2008-01-29
Multi-Step Process for Patterning a Metal Gate Electrode
App 20080020558 - Rotondaro; Antonio L.P. ;   et al.
2008-01-24
Gate dielectric and method
Grant 7,291,890 - Visokay , et al. November 6, 2
2007-11-06
Dual work function gate electrodes using doped polysilicon and a metal silicon germanium compound
Grant 7,233,035 - Rotondaro , et al. June 19, 2
2007-06-19
Method for fabricating transistor gate structures and gate dielectrics thereof
App 20070072364 - Visokay; Mark R. ;   et al.
2007-03-29
Method for fabricating transistor gate structures and gate dielectrics thereof
App 20070072363 - Visokay; Mark R. ;   et al.
2007-03-29
Method to selectively recess ETCH regions on a wafer surface using capoly as a mask
Grant 7,169,659 - Rotondaro , et al. January 30, 2
2007-01-30
Dual Work Function Gate Electrodes Using Doped Polysilicon And A Metal Silicon Germanium Compound
App 20060292790 - Rotondaro; Antonio L. P. ;   et al.
2006-12-28
Method for fabricating transistor gate structures and gate dielectrics thereof
Grant 7,135,361 - Visokay , et al. November 14, 2
2006-11-14
Dual work function gate electrodes using doped polysilicon and a metal silicon germanium compound
Grant 7,109,077 - Rotondaro , et al. September 19, 2
2006-09-19
Gate structure and method
Grant 7,105,891 - Visokay , et al. September 12, 2
2006-09-12
Gate dielectric and method
App 20060138556 - Visokay; Mark R. ;   et al.
2006-06-29
Multi-step process for patterning a metal gate electrode
App 20060115972 - Rotondaro; Antonio L.P. ;   et al.
2006-06-01
Method for integrating high-k dielectrics in transistor devices
Grant 7,045,431 - Rotondaro , et al. May 16, 2
2006-05-16
Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology
Grant 7,033,897 - Chen , et al. April 25, 2
2006-04-25
Gate dielectric and method
Grant 7,018,902 - Visokay , et al. March 28, 2
2006-03-28
Method to selectively recess ETCH regions on a wafer surface using capoly as a mask
App 20060046367 - Rotondaro; Antonio L.P. ;   et al.
2006-03-02
Method for fabricating split gate transistor device having high-k dielectrics
Grant 6,979,623 - Rotondaro , et al. December 27, 2
2005-12-27
Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology
App 20050263834 - Chen, Yuanning ;   et al.
2005-12-01
Gate dielectric and method
App 20050205948 - Rotondaro, Antonio L.P. ;   et al.
2005-09-22
Method to improve the uniformity and reduce the surface roughness of the silicon dielectric interface
Grant 6,939,816 - Rotondaro September 6, 2
2005-09-06
Gate dielectric and method
Grant 6,919,251 - Rotondaro , et al. July 19, 2
2005-07-19
Implementation of split gate transistor technology with high-k gate dielectrics
App 20050136632 - Rotondaro, Antonio L.P. ;   et al.
2005-06-23
Defect control in gate dielectrics
App 20050136690 - Colombo, Luigi ;   et al.
2005-06-23
Hydrogen free formation of gate electrodes
App 20050136580 - Colombo, Luigi ;   et al.
2005-06-23
Method for integrating high-k dielectrics in transistor devices
App 20050136589 - Rotondaro, Antonio L.P. ;   et al.
2005-06-23
Method of fabricating a dielectric layer for a semiconductor structure
App 20050130438 - Rotondaro, Antonio L.P. ;   et al.
2005-06-16
Method for fabricating transistor gate structures and gate dielectrics thereof
App 20050130442 - Visokay, Mark R. ;   et al.
2005-06-16
Anneal of high-k dielectric using NH3 and an oxidizer
App 20050124121 - Rotondaro, Antonio L.P. ;   et al.
2005-06-09
Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology
App 20050087775 - Chen, Yuanning ;   et al.
2005-04-28
Complementary transistors having respective gates formed from a metal and a corresponding metal-silicide
Grant 6,858,908 - Rotondaro , et al. February 22, 2
2005-02-22
High temperature interface layer growth for high-k gate dielectric
Grant 6,852,645 - Colombo , et al. February 8, 2
2005-02-08
Gate structure and method
App 20050023623 - Visokay, Mark R. ;   et al.
2005-02-03
Method and system for forming dual work function gate electrodes in a semiconductor device
App 20050006711 - Rotondaro, Antonio L.P. ;   et al.
2005-01-13
Multiple work function gates
Grant 6,835,639 - Rotondaro , et al. December 28, 2
2004-12-28
High temperature interface layer growth for high-k gate dielectric
App 20040238904 - Colombo, Luigi ;   et al.
2004-12-02
Anneal sequence for high-.kappa. film property optimization
Grant 6,821,873 - Visokay , et al. November 23, 2
2004-11-23
High-k gate dielectric with uniform nitrogen profile and methods for making the same
Grant 6,809,370 - Colombo , et al. October 26, 2
2004-10-26
Gate structure and method
Grant 6,797,599 - Visokay , et al. September 28, 2
2004-09-28
Method and system for forming dual work function gate electrodes in a semiconductor device
Grant 6,794,252 - Rotondaro , et al. September 21, 2
2004-09-21
Gate structure and method
Grant 6,783,997 - Rotondaro , et al. August 31, 2
2004-08-31
Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures
Grant 6,780,719 - Niimi , et al. August 24, 2
2004-08-24
High temperature interface layer growth for high-k gate dielectric
App 20040161883 - Colombo, Luigi ;   et al.
2004-08-19
Method of making multiple work function gates by implanting metals with metallic alloying additives
Grant 6,770,521 - Visokay , et al. August 3, 2
2004-08-03
Dual work function gate electrodes using doped polysilicon and a metal silicon germanium compound
App 20040099916 - Rotondaro, Antonio L. P. ;   et al.
2004-05-27
Dry process for post oxide etch residue removal
Grant 6,727,185 - Smith , et al. April 27, 2
2004-04-27
Gate structure and method
Grant 6,723,658 - Eissa , et al. April 20, 2
2004-04-20
Complementary transistors having respective gates formed from a metal and a corresponding metal-silicide
App 20040033669 - Rotondaro, Antonio L. P. ;   et al.
2004-02-19
Gate dielectric and method
App 20040023462 - Rotondaro, Antonio L.P. ;   et al.
2004-02-05
Gate dielectric and method
App 20040016973 - Rotondaro, Antonio L.P. ;   et al.
2004-01-29
Gate structure and method
App 20040007747 - Visokay, Mark R. ;   et al.
2004-01-15
Gate Structure And Method
App 20040009675 - Eissa, Mona M. ;   et al.
2004-01-15
CVD deposition of M-ON gate dielectrics
App 20040002183 - Colombo, Luigi ;   et al.
2004-01-01
Complementary transistors having respective gates formed from a metal and a corresponding metal-silicide
Grant 6,642,094 - Rotondaro , et al. November 4, 2
2003-11-04
Ultra-thin SiO2using N2O as the oxidant
Grant 6,638,877 - Rotondaro October 28, 2
2003-10-28
Gate structure and method
App 20030164525 - Rotondaro, Antonio L. P. ;   et al.
2003-09-04
Gate structure and method
App 20030148633 - Rotondaro, Antonio L. P. ;   et al.
2003-08-07
Anneal sequence for high-k film property optimization
App 20030129817 - Visokay, Mark R. ;   et al.
2003-07-10
System for creating ultra-shallow dopant profiles
App 20030124783 - Rotondaro, Antonio L. P. ;   et al.
2003-07-03
CVD deposition of M-SION gate dielectrics
App 20030111678 - Colombo, Luigi ;   et al.
2003-06-19
Multiple work function gates
App 20030109121 - Rotondaro, Antonio L. P.
2003-06-12
Oxynitride device and method using non-stoichiometric silicon oxide
App 20030109146 - Colombo, Luigi ;   et al.
2003-06-12
Multiple work function gates
App 20030104663 - Visokay, Mark R. ;   et al.
2003-06-05
Gate dielectric and method
App 20030104710 - Visokay, Mark R. ;   et al.
2003-06-05
Annealing of high-k dielectric materials
Grant 6,544,906 - Rotondaro , et al. April 8, 2
2003-04-08
Method and system for forming dual work function gate electrodes in a semiconductor device
App 20030062577 - Rotondaro, Antonio L.P. ;   et al.
2003-04-03
Gate structure and method
App 20030045080 - Visokay, Mark R. ;   et al.
2003-03-06
Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures
App 20020197886 - Niimi, Hiroaki ;   et al.
2002-12-26
Annealing of high-K dielectric materials
App 20020081826 - Rotondaro, Antonio L. P. ;   et al.
2002-06-27
Ultra-thin SiO2 using N2O as the oxidant
App 20020081862 - Rotondaro, Antonio L. P.
2002-06-27
Complementary transistors having respective gates formed from a metal and a corresponding metal-silicide
App 20020076886 - Rotondaro, Antonio L.P. ;   et al.
2002-06-20
Method to improve the uniformity and reduce the surface roughness of the silicon dielectric interface
App 20020058424 - Rotondaro, Antonio L. P.
2002-05-16
Dry etch process for small-geometry metal gates over thin gate dielectric
Grant 6,261,934 - Kraft , et al. July 17, 2
2001-07-17
Silicon processing method
Grant 6,214,736 - Rotondaro , et al. April 10, 2
2001-04-10
Selective removal of TixNy
Grant 5,948,702 - Rotondaro September 7, 1
1999-09-07

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