Roth; Roman

Patent Applications and Registrations

Patent applications and USPTO patent grants for Roth; Roman.The latest application filed is for "silicon carbide semiconductor device having a metal adhesion and barrier structure and a method of forming such a semiconductor ".

Company Profile

6.15.13

Roth; Roman - Sattendorf AT
Roth; Roman - Sattfendorf AT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Power semiconductor device load terminal Grant 11,315,892 - Roth , et al. April 26, 2	2022-04-26
Silicon carbide semiconductor device having a metal adhesion and barrier structure and a method of forming such a semiconductor device Grant 10,777,506 - Hille , et al. Sept	2020-09-15
Semiconductor device load terminal Grant 10,756,035 - Roth , et al. A	2020-08-25
Silicon Carbide Semiconductor Device Having a Metal Adhesion and Barrier Structure and a Method of Forming Such a Semiconductor App 20200013722 - Hille; Frank ; et al.	2020-01-09
Semiconductor device having a metal adhesion and barrier structure and a method of forming such a semiconductor device Grant 10,475,743 - Hille , et al. Nov	2019-11-12
Semiconductor devices and methods for forming a semiconductor device Grant 10,224,237 - Roth , et al.	2019-03-05
Power Semiconductor Device Load Terminal App 20180366428 - ROTH; Roman ; et al.	2018-12-20
Power semiconductor device load terminal Grant 10,079,217 - Roth , et al. September 18, 2	2018-09-18
Semiconductor device with a reduced band gap zone Grant 9,859,272 - Schulze , et al. January 2, 2	2018-01-02
Semiconductor Devices and Methods for Forming a Semiconductor Device App 20170345711 - Roth; Roman ; et al.	2017-11-30
Intermediate layer for copper structuring and methods of formation thereof Grant 9,773,736 - Joshi , et al. September 26, 2	2017-09-26
Semiconductor Device Having a Metal Adhesion and Barrier Structure and a Method of Forming Such a Semiconductor Device App 20170271268 - Hille; Frank ; et al.	2017-09-21
Power Semiconductor Device Load Terminal App 20170221842 - ROTH; Roman ; et al.	2017-08-03
Semiconductor Device Load Terminal App 20170098620 - Roth; Roman ; et al.	2017-04-06
Semiconductor Device with a Reduced Band Gap Zone App 20170025408 - Schulze; Hans-Joachim ; et al.	2017-01-26
Intermediate Layer for Copper Structuring and Methods of Formation Thereof App 20160218033 - Joshi; Ravi Keshav ; et al.	2016-07-28
Semiconductor device having a locally reinforced metallization structure Grant 9,397,022 - Roth , et al. July 19, 2	2016-07-19
Semiconductor Device Having a Locally Reinforced Metallization Structure App 20160043013 - Roth; Roman ; et al.	2016-02-11
Semiconductor device having a locally reinforced metallization structure and method for manufacturing thereof Grant 9,196,560 - Roth , et al. November 24, 2	2015-11-24
Semiconductor Device Having a Locally Reinforced Metallization Structure and Method for Manufacturing Thereof App 20150115391 - Roth; Roman ; et al.	2015-04-30
Method for fabricating a bond Grant 8,955,219 - Roth , et al. February 17, 2	2015-02-17
Bonding connection between a bonding wire and a power semiconductor chip Grant 8,541,892 - Siepe , et al. September 24, 2	2013-09-24
Bonding Connection Between a Bonding Wire and a Power Semiconductor Chip App 20110121458 - Siepe; Dirk ; et al.	2011-05-26
Semiconductor device including a power device with first metal layer and second metal layer laterally spaced apart Grant 7,851,913 - Gutt , et al. December 14, 2	2010-12-14
Method for Fabricating a Bond App 20100212153 - Roth; Roman ; et al.	2010-08-26
Semiconductor device and method for producing a semiconductor device App 20080122091 - Gutt; Thomas ; et al.	2008-05-29

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