Roohparvar; Fariborz F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Roohparvar; Fariborz F..The latest application filed is for "method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells".

Company Profile

0.14.5

Roohparvar; Fariborz F. - Monte Sereno CA
Roohparvar; Fariborz F. - Cupertino CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells Grant 9,019,774 - Roohparvar April 28, 2	2015-04-28
Method And System For Minimizing Number Of Programming Pulses Used To Program Rows Of Non-volatile Memory Cells App 20140254273 - Roohparvar; Fariborz F.	2014-09-11
Method and apparatus for managing behavior of memory devices Grant 8,432,765 - Roohparvar April 30, 2	2013-04-30
Method and apparatus for managing behavior of memory devices Grant 8,248,881 - Roohparvar August 21, 2	2012-08-21
Method And Apparatus For Managing Behavior Of Memory Devices App 20120075948 - Roohparvar; Fariborz F.	2012-03-29
Method And Apparatus For Managing Behavior Of Memory Devices App 20100195430 - Roohparvar; Fariborz F.	2010-08-05
Method and apparatus for managing behavior of memory devices Grant 7,719,917 - Roohparvar May 18, 2	2010-05-18
Method And Apparatus For Managing Behavior Of Memory Devices App 20090161473 - Roohparvar; Fariborz F.	2009-06-25
Method and apparatus for managing behavior of memory devices Grant 7,512,029 - Roohparvar March 31, 2	2009-03-31
Method and apparatus for managing behavior of memory devices App 20070291570 - Roohparvar; Fariborz F.	2007-12-20
Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell Grant 5,896,400 - Roohparvar , et al. April 20, 1	1999-04-20
Integrated circuit operable in a mode having extremely low power consumption Grant 5,801,585 - Roohparvar September 1, 1	1998-09-01
Output data compression scheme for use in testing IC memories Grant 5,787,097 - Roohparvar , et al. July 28, 1	1998-07-28
Memory circuit with switch for selectively connecting an I/O pad directly to a nonvolatile memory cell and method for operating same Grant 5,706,235 - Roohparvar , et al. January 6, 1	1998-01-06
Method and apparatus for performing memory cell verification on a nonvolatile memory circuit Grant 5,677,879 - Roohparvar , et al. October 14, 1	1997-10-14
Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell Grant 5,594,694 - Roohparvar , et al. January 14, 1	1997-01-14
Method and apparatus for performing memory cell verification on a nonvolatile memory circuit Grant 5,568,426 - Roohparvar , et al. October 22, 1	1996-10-22
Circuit for generating a delayed standby signal in response to an external standby command Grant 5,524,096 - Roohparvar June 4, 1	1996-06-04

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