Romig; Matthew D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Romig; Matthew D..The latest application filed is for "conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips".

Company Profile

0.10.12

Romig; Matthew D. - Wylie TX
Romig; Matthew D. - Richardson TX
Romig; Matthew D - Richardson TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips Grant 9,852,979 - Romig , et al. December 26, 2	2017-12-26
Stacked die power converter Grant 9,842,797 - Carpenter , et al. December 12, 2	2017-12-12
Conductive Through-Polymer Vias for Capacitative Structures Integrated with Packaged Semiconductor Chips App 20170047283 - Romig; Matthew D. ; et al.	2017-02-16
Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips Grant 9,572,261 - Romig , et al. February 14, 2	2017-02-14
Conductive Through-Polymer Vias for Capacitative Structures Integrated with Packaged Semiconductor Chips App 20160286654 - Romig; Matthew D. ; et al.	2016-09-29
Method For Fabricating A Package-in-package For High Heat Dissipation App 20140179064 - Romig; Matthew D. ; et al.	2014-06-26
Structure for high-speed signal integrity in semiconductor package with single-metal-layer substrate Grant 8,723,337 - Howard , et al. May 13, 2	2014-05-13
Method for contacting agglomerate terminals of semiconductor packages Grant 8,716,068 - Edwards , et al. May 6, 2	2014-05-06
Stacked Die Power Converter App 20140061884 - Carpenter; Brian A. ; et al.	2014-03-06
Method For Contacting Agglomerate Terminals Of Semiconductor Packages App 20140038358 - Edwards; Darvin R. ; et al.	2014-02-06
Semiconductor device having agglomerate terminals Grant 8,643,165 - Edwards , et al. February 4, 2	2014-02-04
Package-in-Package for High Heat Dissipation Having Leadframes and Wire Bonds App 20130320514 - Romig; Matthew D. ; et al.	2013-12-05
Structure for High-Speed Signal Integrity in Semiconductor Package with Single-Metal-Layer Substrate App 20130134579 - Howard; Gregory E. ; et al.	2013-05-30
Method for connecting integrated circuit chip to power and ground circuits Grant 8,298,870 - Romig October 30, 2	2012-10-30
Structure and method for uniform current distribution in power supply module Grant 8,299,588 - Tateishi , et al. October 30, 2	2012-10-30
Method For Contacting Agglomerate Terminals Of Semiconductor Packages App 20120211889 - EDWARDS; Darvin R. ; et al.	2012-08-23
Method for Precision Symbolization Using Digital Micromirror Device Technology App 20110012035 - Romig; Matthew D.	2011-01-20
Thermally Enhanced BGA Packages and Methods App 20080083981 - Romig; Matthew D. ; et al.	2008-04-10

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