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name:-0.012067079544067
name:-0.00044894218444824
Romankiw; Lubomyr Taras Patent Filings

Romankiw; Lubomyr Taras

Patent Applications and Registrations

Patent applications and USPTO patent grants for Romankiw; Lubomyr Taras.The latest application filed is for "enhanced magnetic plating method".

Company Profile
0.11.9
  • Romankiw; Lubomyr Taras - Briarcliff Manor NY
  • Romankiw; Lubomyr Taras - New York NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Enhanced Magnetic Plating Method
App 20110220020 - FLOTA; MATTEO ;   et al.
2011-09-15
Enhanced magnetic plating method
Grant 7,964,081 - Flotta , et al. June 21, 2
2011-06-21
Enhanced Magnetic Plating Method and Apparatus
App 20090050486 - Flotta; Matteo ;   et al.
2009-02-26
Ferromagnetic liner for conductive lines of magnetic memory cells
Grant 7,259,025 - Leuschner , et al. August 21, 2
2007-08-21
Ferromagnetic liner for conductive lines of magnetic memory cells
App 20070105241 - Leuschner; Rainer ;   et al.
2007-05-10
Electroplating apparatus and four mask TFT array process with electroplated metal
Grant 7,001,498 - Colgan , et al. February 21, 2
2006-02-21
Ferromagnetic liner for conductive lines of magnetic memory cells
App 20060022286 - Leuschner; Rainer ;   et al.
2006-02-02
CoFe alloy film and process of making same
Grant 6,855,240 - Cooper , et al. February 15, 2
2005-02-15
Three level stacked reflective display
Grant 6,844,957 - Matsumoto , et al. January 18, 2
2005-01-18
Apparatus and method for filling high aspect ratio via holes in electronic substrates
Grant 6,708,873 - Gruber , et al. March 23, 2
2004-03-23
CoFe alloy film and process of making same
App 20030209295 - Cooper, Emanuel Israel ;   et al.
2003-11-13
Process for making low dielectric constant hollow chip structures by removing sacrificial dielectric material after the chip is joined to a carrier
App 20030205817 - Romankiw, Lubomyr Taras
2003-11-06
Process for making low dielectric constant hollow chip structures by removing sacrificial dielectric material after the chip is joined to a chip carrier
Grant 6,596,624 - Romankiw July 22, 2
2003-07-22
Three level stacked reflective display
App 20030043316 - Matsumoto, Keiji ;   et al.
2003-03-06
Electroplating apparatus and four mask TFT array process with electroplated metal
App 20030038037 - Colgan, Evan George ;   et al.
2003-02-27
Electroplating apparatus
Grant 6,495,005 - Colgan , et al. December 17, 2
2002-12-17
Apparatus and method for filling high aspect ratio via holes in electronic substrates
App 20020175438 - Gruber, Peter A. ;   et al.
2002-11-28
Integrated data storage disk and disk drive
Grant 6,430,001 - Chainer , et al. August 6, 2
2002-08-06
Nickel-iron (80:20) alloy thin film electroplating method and electrochemical treatment and plating apparatus
Grant 4,102,756 - Castellani , et al. July 25, 1
1978-07-25
Elimination Of Undercut In An Anodically Active Metal During Chemical Etching
Grant 3,853,715 - Romankiw December 10, 1
1974-12-10

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