loadpatents
name:-0.050321102142334
name:-0.041676998138428
name:-0.0008699893951416
Roehr; Thomas Patent Filings

Roehr; Thomas

Patent Applications and Registrations

Patent applications and USPTO patent grants for Roehr; Thomas.The latest application filed is for "write circuit, non-volatile data storage, method for writing to a plurality of memory cells and method for operating a non-volatile data memory".

Company Profile
0.35.40
  • Roehr; Thomas - Puchheim DE
  • Roehr; Thomas - Aschheim DE
  • Roehr; Thomas - Kanagawa JP
  • Roehr; Thomas - Yokohama JP
  • Roehr; Thomas - Munich DE
  • Roehr, Thomas - Munchen DE
  • Roehr, Thomas - Kanagawa-ken JP
  • Roehr, Thomas - Yokohama-shi JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Write Circuit, Non-volatile Data Storage, Method For Writing To A Plurality Of Memory Cells And Method For Operating A Non-volatile Data Memory
App 20210272610 - Roehr; Thomas ;   et al.
2021-09-02
Memory component with memory cells having changeable resistance and fabrication method therefor
Grant 7,737,428 - Symanczyk , et al. June 15, 2
2010-06-15
Memory device including electrical circuit configured to provide reversible bias across the PMC memory cell to perform erase and write functions
Grant 7,715,226 - Roehr May 11, 2
2010-05-11
Resistive memory arrangement
Grant 7,561,460 - Liaw , et al. July 14, 2
2009-07-14
Memory with resistance memory cell and evaluation circuit
Grant 7,499,349 - Roehr March 3, 2
2009-03-03
Non-volatile memory cell for storage of a data item in an integrated circuit
Grant 7,495,945 - Roehr February 24, 2
2009-02-24
Switching device for configurable interconnect and method for preparing the same
Grant 7,414,257 - Happ , et al. August 19, 2
2008-08-19
Integrated Circuit Including Circuitry To Perform Write And Erase Operations
App 20080123400 - Roehr; Thomas
2008-05-29
Memory having CBRAM memory cells and method
Grant 7,372,716 - Roehr , et al. May 13, 2
2008-05-13
Integrated circuit and method for reading from resistance memory cells
Grant 7,355,898 - Roehr April 8, 2
2008-04-08
Memory device including electrical circuit configured to provide reversible bias across the PMC memory cell to perform erase and write functions
Grant 7,327,603 - Roehr February 5, 2
2008-02-05
Electronic device with a memory cell
Grant 7,289,350 - Roehr October 30, 2
2007-10-30
Resistive Memory Arrangement
App 20070211515 - Liaw; Corvin ;   et al.
2007-09-13
Method for writing data into a memory cell of a conductive bridging random access memory, memory circuit and CBRAM memory circuit
Grant 7,257,013 - Roehr August 14, 2
2007-08-14
Memory circuit having memory cells which have a resistance memory element
Grant 7,251,152 - Roehr July 31, 2
2007-07-31
Memory With Resistance Memory Cell And Evaluation Circuit
App 20070147102 - Roehr; Thomas
2007-06-28
Resistive memory arrangement
Grant 7,215,568 - Liaw , et al. May 8, 2
2007-05-08
Method for writing data into a memory cell of a conductive bridging random access memory, memory circuit and CBRAM memory circuit
App 20070058417 - Roehr; Thomas
2007-03-15
Reducing memory failures in integrated circuits
Grant 7,187,602 - Wohlfahrt , et al. March 6, 2
2007-03-06
Method for programming multi-bit charge-trapping memory cell arrays
Grant 7,184,317 - Roehr , et al. February 27, 2
2007-02-27
Electrical circuit and a method for operating a programmable metallization cell
App 20070041251 - Roehr; Thomas
2007-02-22
Method For Programming Multi-bit Charge-trapping Memory Cell Arrays
App 20070002645 - Roehr; Thomas ;   et al.
2007-01-04
Semiconductor device comprising transition detecting circuit and method of activating the same
Grant 7,127,598 - Oikawa , et al. October 24, 2
2006-10-24
Electronic device with a memory cell
App 20060221663 - Roehr; Thomas
2006-10-05
Non-volatile memory cell for storage of a data item in an integrated circuit
App 20060181916 - Roehr; Thomas
2006-08-17
Semiconductor memory
Grant 7,092,304 - Ogiwara , et al. August 15, 2
2006-08-15
Arrangement and method for reading from resistance memory cells
App 20060067147 - Roehr; Thomas
2006-03-30
Memory component with memory cells having changeable resistance and fabrication method therefor
App 20060060832 - Symanczyk; Ralf ;   et al.
2006-03-23
CBRAM memory cell arrangement and method for programming CBRAM memory cells
App 20060062043 - Roehr; Thomas ;   et al.
2006-03-23
Resistive memory arrangement
App 20060050547 - Liaw; Corvin ;   et al.
2006-03-09
Memory circuit having memory cells which have a resistance memory element
App 20060050546 - Roehr; Thomas
2006-03-09
Semiconductor memory
App 20050276140 - Ogiwara, Ryu ;   et al.
2005-12-15
Switching device for reconfigurable interconnect and method for making the same
Grant 6,972,427 - Roehr , et al. December 6, 2
2005-12-06
Increasing the read signal in ferroelectric memories
Grant 6,972,983 - Roehr , et al. December 6, 2
2005-12-06
Switching Device For Reconfigurable Interconnect And Method For Making The Same
App 20050242337 - Roehr, Thomas ;   et al.
2005-11-03
Switching device for configurable interconnect and method for preparing the same
App 20050219800 - Happ, Thomas D. ;   et al.
2005-10-06
Imprint suppression circuit scheme
Grant 6,950,328 - Roehr , et al. September 27, 2
2005-09-27
Reducing effects of noise coupling in integrated circuits with memory arrays
Grant 6,920,059 - Jacob , et al. July 19, 2
2005-07-19
Imprint suppression circuit scheme
App 20050128779 - Roehr, Thomas ;   et al.
2005-06-16
Hybrid fuses for redundancy
Grant 6,906,969 - Roehr , et al. June 14, 2
2005-06-14
Sensing of memory integrated circuits
Grant 6,903,959 - Roehr , et al. June 7, 2
2005-06-07
Sensing test circuit
Grant 6,885,597 - Roehr , et al. April 26, 2
2005-04-26
Signal margin test mode for FeRAM with ferroelectric reference capacitor
App 20050063213 - Jacob, Michael ;   et al.
2005-03-24
High density flash memory with high speed cache data interface
App 20050050261 - Roehr, Thomas ;   et al.
2005-03-03
Redundancy in series grouped memory architecture
Grant 6,856,560 - Rehm , et al. February 15, 2
2005-02-15
2T2C signal margin test mode using a defined charge and discharge of BL and /BL
Grant 6,826,099 - Joachim , et al. November 30, 2
2004-11-30
MRAM configuration
Grant 6,791,871 - Freitag , et al. September 14, 2
2004-09-14
Integrated magnetoresistive semiconductor memory configuration
Grant 6,775,182 - Boehm , et al. August 10, 2
2004-08-10
Semiconductor device comprising transition detecting circuit and method of activating the same
App 20040123085 - Oikawa, Kohei ;   et al.
2004-06-24
Reducing effects of noise coupling in integrated circuits with memory arrays
App 20040105293 - Jacob, Michael ;   et al.
2004-06-03
2T2C Signal margin test mode using a defined charge and discharge of BL and /BL
App 20040095819 - Joachim, Hans-Oliver ;   et al.
2004-05-20
Ferroelectric memory architecture
App 20040095798 - Wohlfahrt, Joerg ;   et al.
2004-05-20
2T2C signal margin test mode using different pre-charge levels for BL and/BL
App 20040095799 - Jacob, Michael ;   et al.
2004-05-20
2t2c Signal Margin Test Mode Using Resistive Element
App 20040095820 - Jacob, Michael ;   et al.
2004-05-20
2T2C signal margin test mode using resistive element
Grant 6,731,554 - Jacob , et al. May 4, 2
2004-05-04
Increasing the read signal in ferroelectric memories
App 20040076031 - Roehr, Thomas ;   et al.
2004-04-22
Memory architecture with memory cell groups
Grant 6,724,026 - Jacob , et al. April 20, 2
2004-04-20
Hybrid fuses for redundancy
App 20040057293 - Roehr, Thomas ;   et al.
2004-03-25
Sensing Of Memory Integrated Circuits
App 20040057275 - Roehr, Thomas ;   et al.
2004-03-25
Memory Architecture With Memory Cell Groups
App 20040056286 - Jacob, Michael ;   et al.
2004-03-25
Semiconductor memory device
Grant 6,707,736 - Miyakawa , et al. March 16, 2
2004-03-16
Sensing test circuit
App 20040047171 - Roehr, Thomas ;   et al.
2004-03-11
Flexible redundancy for memories
Grant 6,687,171 - Rehm , et al. February 3, 2
2004-02-03
MRAM configuration
App 20040017706 - Freitag, Martin ;   et al.
2004-01-29
Integrated magnetoresistive semiconductor memory configuration
App 20040013022 - Boehm, Thomas ;   et al.
2004-01-22
Semiconductor Memory Device
App 20030227806 - Miyakawa, Tadashi ;   et al.
2003-12-11
Redundancy in chained memory architectures
App 20030202386 - Rehm, Norbert ;   et al.
2003-10-30
Flexible Redundancy For Memories
App 20030202387 - Rehm, Norbert ;   et al.
2003-10-30
Memory architecture
Grant 6,639,824 - Wohlfahrt , et al. October 28, 2
2003-10-28
Reducing Memory Failures in Integrated Circuits
App 20030179616 - Wohlfahrt, Joerg ;   et al.
2003-09-25
Method for preventing unwanted programming in an MRAM configuration
Grant 6,577,527 - Freitag , et al. June 10, 2
2003-06-10
Electronic driver circuit for word lines in a memory matrix, and memory apparatus
Grant 6,501,686 - Boehm , et al. December 31, 2
2002-12-31
Method for fabricating a ferroelectric memory configuration
App 20020110935 - Bergmann, Renate ;   et al.
2002-08-15
Method for preventing unwanted programming in an MRAM configuration
App 20020085411 - Freitag, Martin ;   et al.
2002-07-04
Electronic driver circuit for word lines in a memory matrix, and memory apparatus
App 20020050448 - Boehm, Thomas ;   et al.
2002-05-02

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