Rodder; Mark Stephen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rodder; Mark Stephen.The latest application filed is for "nanosheet field effect transistor cell architecture".

Company Profile

5.8.7

Rodder; Mark Stephen - Dallas TX
Rodder; Mark Stephen - University Park TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
FinFET with reduced extension resistance and methods of manufacturing the same Grant 10,957,786 - Hong , et al. March 23, 2	2021-03-23
Low current leakage finFET and methods of making the same Grant 10,930,768 - Hong , et al. February 23, 2	2021-02-23
Nanosheet field effect transistor cell architecture Grant 10,868,193 - Sengupta , et al. December 15, 2	2020-12-15
Semiconductor device and method for making the same Grant 10,825,723 - Hong , et al. November 3, 2	2020-11-03
Nanosheet Field Effect Transistor Cell Architecture App 20200152801 - Sengupta; Rwik ; et al.	2020-05-14
Semiconductor Device And Method For Making The Same App 20200135549 - Hong; Joon Goo ; et al.	2020-04-30
Low Current Leakage Finfet And Methods Of Making The Same App 20200127125 - Hong; Joon Goo ; et al.	2020-04-23
Finfet With Reduced Extension Resistance And Methods Of Manufacturing The Same App 20200127123 - Hong; Joon Goo ; et al.	2020-04-23
Gate-all-around field effect transistors with horizontal nanosheet conductive channel structures for MOL/inter-channel spacing and related cell architectures Grant 9,685,564 - Sengupta , et al. June 20, 2	2017-06-20
Gate-all-around Field Effect Transistors With Horizontal Nanosheet Conductive Channel Structures For Mol/inter-channel Spacing And Related Cell Architectures App 20170110595 - Sengupta; Rwik ; et al.	2017-04-20
Methods of forming low-defect strain-relaxed layers on lattice-mismatched substrates and related semiconductor structures and devices Grant 9,343,303 - Wang , et al. May 17, 2	2016-05-17
Methods Of Forming Low-defect Strain-relaxed Layers On Lattice-mismatched Substrates And Related Semiconductor Structures And Devices App 20150270120 - Wang; Wei-E ; et al.	2015-09-24
Method of forming a transistor having thin doped semiconductor gate Grant 6,087,248 - Rodder July 11, 2	2000-07-11

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