Patent | Date |
---|
Divergent charged particle implantation for improved transistor symmetry Grant 7,807,978 - Bernstein , et al. October 5, 2 | 2010-10-05 |
Method for reducing dislocation threading using a suppression implant Grant 7,638,415 - Mollat , et al. December 29, 2 | 2009-12-29 |
Method For Reducing Dislocation Threading Using A Suppression Implant App 20090061606 - MOLLAT; MARTIN ;   et al. | 2009-03-05 |
Method for reducing dislocation threading using a suppression implant Grant 7,466,009 - Mollat , et al. December 16, 2 | 2008-12-16 |
Method for manufacturing a semiconductor device containing metal silicide regions Grant 7,422,967 - DeLoach , et al. September 9, 2 | 2008-09-09 |
Divergent Charged Particle Implantation For Improved Transistor Symmetry App 20080206971 - Bernstein; James D. ;   et al. | 2008-08-28 |
Divergent Charged Particle Implantation for Improved Transistor Symmetry App 20080142724 - Bernstein; James D. ;   et al. | 2008-06-19 |
Divergent charged particle implantation for improved transistor symmetry Grant 7,385,202 - Bernstein , et al. June 10, 2 | 2008-06-10 |
Silicide formation using a low temperature anneal process Grant 7,335,595 - Robertson , et al. February 26, 2 | 2008-02-26 |
A Method For Reducing Dislocation Threading Using A Suppression Implant App 20070281433 - Mollat; Martin ;   et al. | 2007-12-06 |
Implant Optimization Scheme App 20070257211 - Bernstein; James D. ;   et al. | 2007-11-08 |
Implant optimization scheme Grant 7,253,072 - Bernstein , et al. August 7, 2 | 2007-08-07 |
Method for implanting dopants within a substrate by tilting the substrate relative to the implant source Grant 7,232,744 - Ghneim , et al. June 19, 2 | 2007-06-19 |
Integrated circuit metal silicide method Grant 7,208,409 - Lu , et al. April 24, 2 | 2007-04-24 |
Novel method for manufacturing a semiconductor device containing metal silicide regions App 20060258091 - DeLoach; Juanita ;   et al. | 2006-11-16 |
Divergent charged particle implantation for improved transistor symmetry App 20060121706 - Bernstein; James D. ;   et al. | 2006-06-08 |
Semiconductor device having optimized shallow junction geometries and method for fabrication thereof Grant 7,033,879 - Hornung , et al. April 25, 2 | 2006-04-25 |
Silicide method for CMOS integrated circuits Grant 7,029,967 - Zhao , et al. April 18, 2 | 2006-04-18 |
Method for implanting dopants within a substrate by tilting the substrate relative to the implant source App 20060073685 - Ghneim; Said ;   et al. | 2006-04-06 |
Silicide method for CMOS integrated circuits App 20060019478 - Zhao; Song ;   et al. | 2006-01-26 |
Silicide formation using a low temperature anneal process App 20060014387 - Robertson; Lance S. ;   et al. | 2006-01-19 |
Semiconductor device having optimized shallow junction geometries and method for fabrication thereof App 20060001105 - Hornung; Brian E. ;   et al. | 2006-01-05 |
Implant optimization scheme App 20050255683 - Bernstein, James D. ;   et al. | 2005-11-17 |
Semiconductor device having optimized shallow junction geometries and method for fabrication thereof App 20050245021 - Hornung, Brian E. ;   et al. | 2005-11-03 |
Integrated circuit metal silicide method App 20050208764 - Lu, Jiong-Ping ;   et al. | 2005-09-22 |
Ultra shallow junction formation App 20050112830 - Jain, Amitabh ;   et al. | 2005-05-26 |
Ultra shallow junction formation App 20040115889 - Jain, Amitabh ;   et al. | 2004-06-17 |
Process for optimizing junctions formed by solid phase epitaxy App 20040115892 - Robertson, Lance S. | 2004-06-17 |
Process for optimizing junctions formed by solid phase epitaxy Grant 6,699,771 - Robertson March 2, 2 | 2004-03-02 |
Process For Optimizing Junctions Formed By Solid Phase Epitaxy App 20040029350 - Robertson, Lance S. | 2004-02-12 |