loadpatents
name:-0.028285026550293
name:-0.045284986495972
name:-0.0074348449707031
Robertson; Iain Patent Filings

Robertson; Iain

Patent Applications and Registrations

Patent applications and USPTO patent grants for Robertson; Iain.The latest application filed is for "monitoring processors operating in lockstep".

Company Profile
7.37.22
  • Robertson; Iain - Bedfordshire GB
  • Robertson; Iain - Bedford GB
  • Robertson; Iain - Cambridge GB
  • Robertson; Iain - Highland GB
  • Robertson; Iain - Cople GB
  • Robertson; Iain - Bedforshire GB
  • Robertson; Iain - Cople Village GB2
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Broadcasting event messages in a System on Chip using a crosslinked tree structure
Grant 11,429,459 - Stewart , et al. August 30, 2
2022-08-30
Monitoring processors operating in lockstep
Grant 11,221,901 - Panesar , et al. January 11, 2
2022-01-11
Variable address length communication protocol
Grant 11,089,540 - Robertson , et al. August 10, 2
2021-08-10
Monitoring Processors Operating in Lockstep
App 20210157667 - Panesar; Gajinder ;   et al.
2021-05-27
Message Monitoring
App 20210103537 - Panesar; Gajinder ;   et al.
2021-04-08
Broadcasting Event Messages In A System On Chip Using A Crosslinked Tree Structure
App 20210049055 - Stewart; Callum ;   et al.
2021-02-18
Emulating Broadcast in a Network on Chip
App 20210036880 - Robertson; Iain
2021-02-04
Handling Trace Data for Jumps in Program Flow
App 20210011833 - Robertson; Iain
2021-01-14
Real-Time Tracing of Instruction Execution on a Processor
App 20200334128 - Robertson; Iain
2020-10-22
Power supply
Grant 10,620,237 - Dearman , et al.
2020-04-14
Variable Address Length Communication Protocol
App 20200015151 - Robertson; Iain ;   et al.
2020-01-09
Integrated circuit security
Grant 10,394,721 - Panesar , et al. A
2019-08-27
Power Supply
App 20170176498 - Dearman; Michael ;   et al.
2017-06-22
Integrated Circuit Security
App 20170153988 - Panesar; Gajinder ;   et al.
2017-06-01
Data transfer clock recovery for legacy systems
Grant 9,419,788 - Robertson , et al. August 16, 2
2016-08-16
Data Transfer Clock Recovery For Legacy Systems
App 20150333902 - Robertson; Iain ;   et al.
2015-11-19
Data transfer clock recovery for legacy systems
Grant 9,191,194 - Robertson , et al. November 17, 2
2015-11-17
Data Transfer Clock Recovery for Legacy Systems
App 20130202072 - Robertson; Iain ;   et al.
2013-08-08
Circuit Testing Arrangement For Serialiser/deserialiser
App 20130194935 - Robertson; Iain
2013-08-01
System and method to facilitate deterministic testing of data transfers between independent clock domains on a chip
Grant 7,975,082 - Chiu , et al. July 5, 2
2011-07-05
PC-connectivity for on-chip memory
Grant 7,873,886 - Robertson January 18, 2
2011-01-18
System and Method to Facilitate Deterministic Testing of Data Transfers between Independent Clock Domains on a Chip
App 20090240969 - Chiu; Frank C. ;   et al.
2009-09-24
Serial burn-in monitor
Grant 7,243,281 - Robertson July 10, 2
2007-07-10
Data transmission
Grant 7,236,552 - Robertson , et al. June 26, 2
2007-06-26
Data transmission
Grant 7,233,628 - Robertson , et al. June 19, 2
2007-06-19
Pc-connectivity For On-chip Memory
App 20070089002 - Robertson; Iain
2007-04-19
Transfer request bus node for transfer controller with hub and ports
Grant 7,047,284 - Agarwala , et al. May 16, 2
2006-05-16
Communications interface between clock domains with minimal latency
Grant 7,027,447 - Robertson , et al. April 11, 2
2006-04-11
Serial burn-in monitor
App 20050289420 - Robertson, Iain
2005-12-29
Write allocation counter for transfer controller with hub and ports
Grant 6,954,468 - Agarwala , et al. October 11, 2
2005-10-11
Using write request queue to prevent bottlenecking on slow ports in transfer controller with hub and ports architecture
Grant 6,904,474 - Robertson June 7, 2
2005-06-07
Maintaining remote queue using two counters in transfer controller with hub and ports
Grant 6,892,253 - Robertson May 10, 2
2005-05-10
Request queue manager in transfer controller with hub and ports
Grant 6,868,087 - Agarwala , et al. March 15, 2
2005-03-15
Data processing apparatus with register file bypass
Grant 6,839,831 - Balmer , et al. January 4, 2
2005-01-04
Data transmission
App 20040135712 - Robertson, Iain ;   et al.
2004-07-15
Packet memory management (PACMAN) scheme
Grant 6,741,611 - Szczepanek , et al. May 25, 2
2004-05-25
Data transmission
App 20040052322 - Robertson, Iain ;   et al.
2004-03-18
Modular interconnection of network switches
Grant 6,690,668 - Szczepanek , et al. February 10, 2
2004-02-10
Effective channel priority processing for transfer controller with hub and ports
Grant 6,681,270 - Agarwala , et al. January 20, 2
2004-01-20
Parallel transfer size calculation and annulment determination in transfer controller with hub and ports
Grant 6,658,503 - Agarwala , et al. December 2, 2
2003-12-02
External direct memory access processor interface to centralized transaction processor
Grant 6,654,819 - Comisky , et al. November 25, 2
2003-11-25
Method and apparatus for data transfer employing closed loop of memory nodes
Grant 6,654,834 - Robertson , et al. November 25, 2
2003-11-25
Distributed service request system for providing fair arbitration using token passing scheme to resolve collisions
Grant 6,651,083 - Robertson , et al. November 18, 2
2003-11-18
Ring configuration for network switches
Grant 6,621,818 - Szczepanek , et al. September 16, 2
2003-09-16
Flip-flop design
Grant 6,614,276 - Robertson , et al. September 2, 2
2003-09-02
Transfer controller with hub and ports architecture
Grant 6,496,740 - Robertson , et al. December 17, 2
2002-12-17
Technique for pipelining synchronization to maintain throughput across two asynchronous clock domain boundaries
Grant 6,493,818 - Robertson December 10, 2
2002-12-10
Maintaining remote queue using two counters in transfer controller with hub and ports
App 20020120796 - Robertson, Iain
2002-08-29
Data processing apparatus with register file bypass
App 20020108026 - Balmer, Keith ;   et al.
2002-08-08
Flip-flop design
App 20020005745 - Robertson, Iain ;   et al.
2002-01-17
Technique for pipelining synchronization to maintain throughput across two asynchronous clock domain boundaries
App 20010042219 - Robertson, Iain
2001-11-15
Communications interface between clock domains with minimal latency
App 20010038633 - Robertson, Iain ;   et al.
2001-11-08
Data transfer controller employing differing memory interface protocols dependent upon external input at predetermined time
Grant 6,185,629 - Simpson , et al. February 6, 2
2001-02-06
Memory configuration cache with multilevel hierarchy least recently used cache entry replacement
Grant 5,956,744 - Robertson , et al. September 21, 1
1999-09-21
Memory access controller utilizing cache memory to store configuration information
Grant 5,850,632 - Robertson December 15, 1
1998-12-15
Message passing and blast interrupt from processor
Grant 5,724,599 - Balmer , et al. March 3, 1
1998-03-03
Mask generator usable with addressing schemes in either big endian or little endian format
Grant 5,655,065 - Robertson , et al. August 5, 1
1997-08-05
Guided transfers with variable stepping
Grant 5,651,127 - Gove , et al. July 22, 1
1997-07-22
Architecture of transfer processor
Grant 5,524,265 - Balmer , et al. June 4, 1
1996-06-04

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