loadpatents
name:-0.0087740421295166
name:-0.0086958408355713
name:-0.00045204162597656
Riley; Terrence J. Patent Filings

Riley; Terrence J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Riley; Terrence J..The latest application filed is for "method to obtain uniform nitrogen profile in gate dielectrics".

Company Profile
0.8.5
  • Riley; Terrence J. - Murphy TX
  • RILEY; TERRENCE J. - RICHARDSON TX
  • Riley; Terrence J. - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Sidewall spacer pullback scheme
Grant 7,638,402 - Nandakumar , et al. December 29, 2
2009-12-29
Method To Obtain Uniform Nitrogen Profile In Gate Dielectrics
App 20080315324 - VARGHESE; AJITH ;   et al.
2008-12-25
Method to obtain uniform nitrogen profile in gate dielectrics
Grant 7,435,651 - Varghese , et al. October 14, 2
2008-10-14
Sidewall spacer pullback scheme
App 20080160708 - Nandakumar; Mahalingam ;   et al.
2008-07-03
Method to obtain uniform nitrogen profile in gate dielectrics
App 20070054455 - Varghese; Ajith ;   et al.
2007-03-08
Method for adjusting rapid thermal processing (RTP) recipe setpoints based on wafer electrical test (WET) parameters
Grant 6,856,849 - Riley , et al. February 15, 2
2005-02-15
Run-to-run control method for proportional-integral-derivative (PID) controller tuning for rapid thermal processing (RTP)
Grant 6,819,963 - Riley , et al. November 16, 2
2004-11-16
Method and apparatus for using tool state information to identify faulty wafers
Grant 6,738,731 - Riley , et al. May 18, 2
2004-05-18
Method and apparatus for fault detection of a processing tool and control thereof using an advanced process control (APC) framework
Grant 6,725,402 - Coss, Jr. , et al. April 20, 2
2004-04-20
Method and apparatus for fault model analysis in manufacturing tools
Grant 6,697,691 - Miller , et al. February 24, 2
2004-02-24
Wafer-less qualification of a processing tool
Grant 6,629,012 - Riley , et al. September 30, 2
2003-09-30
Run-to-run control method for proportional-integral-derivative (PID) controller tuning for rapid thermal processing (RTP)
App 20020107604 - Riley, Terrence J. ;   et al.
2002-08-08
Method for adjusting rapid thermal processing (RTP) recipe setpoints based on wafer electrical test (WET) parameters
App 20020095278 - Riley, Terrence J. ;   et al.
2002-07-18

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