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Patent applications and USPTO patent grants for Riemenschneider; Bert R..The latest application filed is for "sublithographic antifuse".
Patent | Date |
---|---|
Sublithographic antifuse Grant 5,625,220 - Liu , et al. April 29, 1 | 1997-04-29 |
Process for thickening selective gate oxide regions Grant 5,595,922 - Tigelaar , et al. January 21, 1 | 1997-01-21 |
Sidewall anti-fuse structure and method for making Grant 5,365,105 - Liu , et al. November 15, 1 | 1994-11-15 |
Trench capacitor DRAM cell and method of manufacture Grant 5,225,363 - Riemenschneider , et al. July 6, 1 | 1993-07-06 |
Non-volatile semiconductor memory Grant 5,168,334 - Mitchell , et al. December 1, 1 | 1992-12-01 |
Fabricating a single level merged EEPROM cell having an ONO memory stack substantially spaced from the source region Grant 5,120,672 - Mitchell , et al. June 9, 1 | 1992-06-09 |
Trench capacitor DRAM cell with diffused bit lines adjacent to a trench Grant 5,105,245 - Riemenschneider , et al. April 14, 1 | 1992-04-14 |
Non-volatile memory with improved coupling between gates Grant 5,057,886 - Riemenschneider , et al. October 15, 1 | 1991-10-15 |
Method of making high density EEPROM Grant 4,980,309 - Mitchell , et al. December 25, 1 | 1990-12-25 |
Erasable programmable memory including buried diffusion source/drain lines and erase lines Grant 4,924,437 - Paterson , et al. May 8, 1 | 1990-05-08 |
EEPROM including programming electrode extending through the control gate electrode Grant 4,853,895 - Mitchell , et al. August 1, 1 | 1989-08-01 |
X-cell EEPROM array Grant 4,839,705 - Tigelaar , et al. June 13, 1 | 1989-06-13 |
Stacked capacitor Grant 4,827,323 - Tigelaar , et al. May 2, 1 | 1989-05-02 |
Capacitive coupling Grant 4,812,885 - Riemenschneider March 14, 1 | 1989-03-14 |
Fabricating a stacked capacitor Grant 4,685,197 - Tigelaar , et al. August 11, 1 | 1987-08-11 |
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