Riedlinger; Reid James
Patent Applications and Registrations
Patent applications and USPTO patent grants for Riedlinger; Reid James.The latest application filed is for "circuit and circuit design method".
- Riedlinger; Reid James - Wellington CO
- Riedlinger, Reid James - Fort Collins CO
- Riedlinger; Reid James - Ft Collins CO
| Patent | Date |
|---|---|
| Circuit and circuit design method Grant 7,698,673 - Afleck , et al. April 13, 2 | 2010-04-13 |
| Circuit and circuit design method App 20060055428 - Affleck; Steven Ray ; et al. | 2006-03-16 |
| Dual-ported Read Sram Cell With Improved Soft Error Immunity App 20050078543 - Riedlinger, Reid James ; et al. | 2005-04-14 |
| Dual-ported read SRAM cell with improved soft error immunity Grant 6,873,565 - Riedlinger , et al. March 29, 2 | 2005-03-29 |
| System and method utilizing speculative cache access for improved performance Grant 6,647,464 - Riedlinger , et al. November 11, 2 | 2003-11-11 |
| Bank conflict determination App 20030163643 - Riedlinger, Reid James ; et al. | 2003-08-28 |
| Cache address conflict mechanism without store buffers Grant 6,539,457 - Mulla , et al. March 25, 2 | 2003-03-25 |
| L1 cache memory Grant 6,507,892 - Mulla , et al. January 14, 2 | 2003-01-14 |
| Virtual address bypassing using local page mask Grant 6,446,187 - Riedlinger , et al. September 3, 2 | 2002-09-03 |
| Multiple issue algorithm with over subscription avoidance feature to get high bandwidth through cache pipeline Grant 6,427,189 - Mulla , et al. July 30, 2 | 2002-07-30 |
| Latching annihilation based logic gate App 20020030512 - Naffziger, Samuel D. ; et al. | 2002-03-14 |
| System and method for enabling/disabling SRAM banks for memory access Grant 6,285,579 - Riedlinger , et al. September 4, 2 | 2001-09-04 |
| Register structure with a dual-ended write mechanism Grant 6,226,217 - Riedlinger , et al. May 1, 2 | 2001-05-01 |
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