Richter; Fangyun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Richter; Fangyun.The latest application filed is for "methods of forming gate structures for reduced leakage".

Company Profile

1.20.2

Richter; Fangyun - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Manufacture of interconnects for integration of multiple integrated circuits Grant 10,541,205 - Cheng , et al. Ja	2020-01-21
Strain-enhanced transistors with adjustable layouts Grant 9,634,094 - Venkitachalam , et al. April 25, 2	2017-04-25
Integrated circuit and a method to optimize strain inducing composites Grant 9,484,411 - Venkitachalam , et al. November 1, 2	2016-11-01
High-k dielectric device and process Grant 9,166,045 - Hsu , et al. October 20, 2	2015-10-20
Metal routing in advanced process technologies Grant 9,099,531 - Cheng , et al. August 4, 2	2015-08-04
Methods of forming gate structures for reduced leakage Grant 8,921,217 - Lin , et al. December 30, 2	2014-12-30
Method for fabricating integrated circuits with patterned thermal adjustment layers for design optimization Grant 8,912,104 - Ratakonda , et al. December 16, 2	2014-12-16
High-k dielectric device and process Grant 8,835,265 - Hsu , et al. September 16, 2	2014-09-16
Integrated circuit and a method to optimize strain inducing composites Grant 8,765,541 - Venkitachalam , et al. July 1, 2	2014-07-01
Strain enhanced transistors with adjustable layouts Grant 8,664,725 - Venkitachalam , et al. March 4, 2	2014-03-04
Methods Of Forming Gate Structures For Reduced Leakage App 20130157451 - Lin; Wuu-Cherng ; et al.	2013-06-20
Density transition zones for integrated circuits Grant 8,159,044 - Chen , et al. April 17, 2	2012-04-17
Method and apparatus for reducing charge loss in a nonvolatile memory cell Grant 7,291,546 - Rahim , et al. November 6, 2	2007-11-06
Bipolar transistors with low base resistance for CMOS integrated circuits Grant 7,285,454 - Liang , et al. October 23, 2	2007-10-23
Bipolar transistors with low base resistance for CMOS integrated circuits Grant 6,972,466 - Liang , et al. December 6, 2	2005-12-06
Method and apparatus for reducing charge loss in a nonvolatile memory cell Grant 6,773,987 - Rahim , et al. August 10, 2	2004-08-10

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