loadpatents
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name:-0.0067720413208008
name:-0.0027000904083252
Richard; Emmanuel Patent Filings

Richard; Emmanuel

Patent Applications and Registrations

Patent applications and USPTO patent grants for Richard; Emmanuel.The latest application filed is for "method of simultaneously manufacturing different transistors".

Company Profile
2.5.7
  • Richard; Emmanuel - Saint Pierre D'allevard FR
  • Richard; Emmanuel - Le Champ-Pres-Froges FR
  • Richard; Emmanuel - Mennecy FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of forming MOS and bipolar transistors
Grant 10,381,344 - Weber , et al. A
2019-08-13
Device comprising multiple gate structures and method of simultaneously manufacturing different transistors
Grant 10,332,808 - Julien , et al.
2019-06-25
Method Of Simultaneously Manufacturing Different Transistors
App 20180269115 - Julien; Franck ;   et al.
2018-09-20
Method Of Forming Mos And Bipolar Transistors
App 20180175022 - Weber; Olivier ;   et al.
2018-06-21
Method of forming MOS and bipolar transistors
Grant 9,929,146 - Weber , et al. March 27, 2
2018-03-27
Mos Transistor Structure, In Particular For High Voltages Using A Technology Of The Silicon-on-insulator Type
App 20170317106 - Boivin; Philippe ;   et al.
2017-11-02
Method Of Forming Mos And Bipolar Transistors
App 20170271325 - Weber; Olivier ;   et al.
2017-09-21
Method For Relaxing The Transverse Mechanical Stresses Within The Active Region Of A Mos Transistor, And Corresponding Integrated Circuit
App 20160099183 - Rideau; Denis ;   et al.
2016-04-07
Method For Relaxing The Transverse Mechanical Stresses Within The Active Region Of A Mos Transistor, And Corresponding Integrated Circuit
App 20150097241 - Rideau; Denis ;   et al.
2015-04-09
Method for manufacturing a hybrid SOI/bulk semiconductor wafer
Grant 8,877,600 - Fenouillet-Beranger , et al. November 4, 2
2014-11-04
Method For Manufacturing A Hybrid Soi/bulk Semiconductor Wafer
App 20140170834 - Fenouillet-Beranger; Claire ;   et al.
2014-06-19
Method for improving the quality of a metal layer deposited from a plating bath
Grant 6,495,453 - Brongersma , et al. December 17, 2
2002-12-17

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