Reimer; Jay B.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Reimer; Jay B..The latest application filed is for "apparatus and method for distribution of signals from a high level data link controller to multiple digital signal processor cores".

Company Profile

0.11.10

Reimer; Jay B. - Houston TX
Reimer; Jay B. - Lubbock TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Apparatus and method for an interface unit for data transfer between a host processing unit and a multi-target digital signal processing unit in an asynchronous transfer mode Grant 7,570,646 - Li , et al. August 4, 2	2009-08-04
Debugger breakpoint management in a multicore DSP device having shared program memory Grant 7,131,114 - Nguyen , et al. October 31, 2	2006-10-31
Apparatus and method for responding to a interruption of a packet flow to a high level data link controller in a signal processing system Grant 7,054,958 - Iyer , et al. May 30, 2	2006-05-30
External bus arbitration technique for multicore DSP device Grant 7,006,521 - Nguyen , et al. February 28, 2	2006-02-28
Extended dynamic range watchdog timer Grant 6,959,404 - Hirakawa , et al. October 25, 2	2005-10-25
Multicore DSP device having shared program memory with conditional write protection Grant 6,895,479 - Reimer , et al. May 17, 2	2005-05-17
Multicore DSP device having coupled subsystem memory buses for global DMA access Grant 6,892,266 - Reimer , et al. May 10, 2	2005-05-10
Apparatus and method for distribution of signals from a high level data link controller to multiple digital signal processor cores Grant 6,823,402 - Smith , et al. November 23, 2	2004-11-23
Shared program memory for use in multicore DSP devices Grant 6,691,216 - Kelly , et al. February 10, 2	2004-02-10
Apparatus and method for controlling block signal flow in a multi digital signal processor configuration from a shared peripheral direct memory controller to high level data link controller App 20030093594 - Smith, Patrick J. ; et al.	2003-05-15
Apparatus and method for distribution of signals from a high level data link controller to multiple digital signal processor cores App 20030093595 - Smith, Patrick J. ; et al.	2003-05-15
Apparatus and method for responding to a interruption of a packet flow to a high level data link controller in a signal processing system App 20030093603 - Iyer, Ramesh A. ; et al.	2003-05-15
Apparatus and method for an interface unit for data transfer between a host processing unit and a multi-target digital signal processing unit in an asynchronous transfer mode App 20030076839 - Li, Martin ; et al.	2003-04-24
Extended dynamic range watchdog timer App 20030074594 - Hirakawa, Katsunobu ; et al.	2003-04-17
Debugger breakpoint management in a multicore DSP device having shared program memory App 20030014736 - Nguyen, Tai H. ; et al.	2003-01-16
Multicore DSP device having shared program memory with conditional write protection App 20020059502 - Reimer, Jay B. ; et al.	2002-05-16
External bus arbitration technique for multicore DSP device App 20020057711 - Nguyen, Duy Q. ; et al.	2002-05-16
Multicore DSP device having coupled subsystem memory buses for global DMA access App 20020059393 - Reimer, Jay B. ; et al.	2002-05-16
Shared program memory for use in multicore DSP devices App 20020056030 - Kelly, Kenneth C. ; et al.	2002-05-09
Low data rate speech encoding employing syllable pitch patterns Grant 4,802,223 - Lin , et al. January 31, 1	1989-01-31
Method and apparatus for voice control of a computer Grant 4,704,696 - Reimer , et al. November 3, 1	1987-11-03

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