| Patent | Date |
|---|
Field-effect Transistors With A Grown Silicon-germanium Channel
App 20200051808 - Metze; Carsten ; et al. | 2020-02-13 |
Field-effect transistors with a grown silicon-germanium channel
Grant 10,559,593 - Metze , et al. Feb | 2020-02-11 |
Method of manufacturing a semiconductor wafer having an SOI configuration
Grant 9,842,762 - Reimer , et al. December 12, 2 | 2017-12-12 |
Methods For Etching Dielectric Materials In The Fabrication Of Integrated Circuits
App 20150235906 - von Kluge; Johannes ; et al. | 2015-08-20 |
Methods for etching dielectric materials in the fabrication of integrated circuits
Grant 9,054,041 - von Kluge , et al. June 9, 2 | 2015-06-09 |
Superior Integrity Of A High-k Gate Stack By Forming A Controlled Undercut On The Basis Of A Wet Chemistry
App 20150137270 - Beyer; Sven ; et al. | 2015-05-21 |
Superior integrity of a high-K gate stack by forming a controlled undercut on the basis of a wet chemistry
Grant 8,951,901 - Beyer , et al. February 10, 2 | 2015-02-10 |
Methods For Etching Dielectric Materials In The Fabrication Of Integrated Circuits
App 20150024578 - von Kluge; Johannes ; et al. | 2015-01-22 |
Methods of forming a semiconductor device by performing a wet acid etching process while preventing or reducing loss of active area and/or isolation regions
Grant 8,815,674 - Reimer , et al. August 26, 2 | 2014-08-26 |
Methods Of Forming A Semiconductor Device By Performing A Wet Acid Etching Process While Preventing Or Reducing Loss Of Active Area And/or Isolation Regions
App 20140227869 - Reimer; Berthold ; et al. | 2014-08-14 |
Method of forming a semiconductor structure including a wet etch process for removing silicon nitride
Grant 8,716,136 - Reimer , et al. May 6, 2 | 2014-05-06 |
Method Of Forming A Semiconductor Structure Including A Wet Etch Process For Removing Silicon Nitride
App 20140113455 - Reimer; Berthold ; et al. | 2014-04-24 |
Methods for PFET fabrication using APM solutions
Grant 8,703,620 - Wasyluk , et al. April 22, 2 | 2014-04-22 |
Methods for pFET fabrication using APM solutions
Grant 8,658,543 - Wasyluk , et al. February 25, 2 | 2014-02-25 |
Tmah Recess For Silicon Germanium In Positive Channel Region For Cmos Device
App 20130299874 - Wasyluk; Joanna ; et al. | 2013-11-14 |
Methods of controlling the etching of silicon nitride relative to silicon dioxide
Grant 8,580,133 - Reimer , et al. November 12, 2 | 2013-11-12 |
Maintaining integrity of a high-K gate stack by passivation using an oxygen plasma
Grant 8,524,591 - Beyer , et al. September 3, 2 | 2013-09-03 |
Methods For Pfet Fabrication Using Apm Solutions
App 20130203245 - WASYLUK; Joanna ; et al. | 2013-08-08 |
Methods For Pfet Fabrication Using Apm Solutions
App 20130203244 - Wasyluk; Joanna ; et al. | 2013-08-08 |
Patterning of Sensitive Metal-Containing Layers With Superior Mask Material Adhesion by Providing a Modified Surface Layer
App 20130126984 - Reimer; Berthold ; et al. | 2013-05-23 |
Uniform high-k metal gate stacks by adjusting threshold voltage for sophisticated transistors by diffusing a metal species prior to gate patterning
Grant 8,445,344 - Carter , et al. May 21, 2 | 2013-05-21 |
Methods of Controlling the Etching of Silicon Nitride Relative to Silicon Dioxide
App 20130122716 - Reimer; Berthold ; et al. | 2013-05-16 |
Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers
Grant 8,357,575 - Hempel , et al. January 22, 2 | 2013-01-22 |
Technique For Exposing A Placeholder Material In A Replacement Gate Approach By Modifying A Removal Rate Of Stressed Dielectric Overlayers
App 20120282764 - Hempel; Klaus ; et al. | 2012-11-08 |
Enhanced etch stop capability during patterning of silicon nitride including layer stacks by providing a chemically formed oxide layer during semiconductor processing
Grant 8,283,232 - Beyer , et al. October 9, 2 | 2012-10-09 |
Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers
Grant 8,247,281 - Hempel , et al. August 21, 2 | 2012-08-21 |
Superior Integrity of a High-K Gate Stack by Forming a Controlled Undercut on the Basis of a Wet Chemistry
App 20120086056 - Beyer; Sven ; et al. | 2012-04-12 |
Reducing contamination in a process flow of forming a channel semiconductor alloy in a semiconductor device
Grant 8,048,748 - Kronholz , et al. November 1, 2 | 2011-11-01 |
Reducing Contamination In A Process Flow Of Forming A Channel Semiconductor Alloy In A Semiconductor Device
App 20110189831 - Kronholz; Stephan ; et al. | 2011-08-04 |
Maintaining Integrity Of A High-k Gate Stack By Passivation Using An Oxygen Plasma
App 20110049585 - Beyer; Sven ; et al. | 2011-03-03 |
Technique For Exposing A Placeholder Material In A Replacement Gate Approach By Modifying A Removal Rate Of Stressed Dielectric Overlayers
App 20100330790 - Hempel; Klaus ; et al. | 2010-12-30 |
Uniform High-k Metal Gate Stacks By Adjusting Threshold Voltage For Sophisticated Transistors By Diffusing A Metal Species Prior To Gate Patterning
App 20100327373 - Carter; Richard ; et al. | 2010-12-30 |
Enhanced Etch Stop Capability During Patterning Of Silicon Nitride Including Layer Stacks By Providing A Chemically Formed Oxide Layer During Semiconductor Processing
App 20100304542 - Beyer; Sven ; et al. | 2010-12-02 |
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