Reid; J. Robert

Patent Applications and Registrations

Patent applications and USPTO patent grants for Reid; J. Robert.The latest application filed is for "substrate-free interconnected electronic mechanical structural systems".

Company Profile

7.9.9

Reid; J. Robert - Billerica MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated chip scale packages Grant 10,553,511 - Reid Fe	2020-02-04
Substrate-free Interconnected Electronic Mechanical Structural Systems App 20200022277 - Hovey; Ian ; et al.	2020-01-16
Structures And Methods For Interconnects And Associated Alignment And Assembly Mechanisms For And Between Chips, Components, And App 20190393580 - Rollin; Jean-Marc ; et al.	2019-12-26
Integrated Chip Scale Packages App 20190287869 - Reid; J. Robert	2019-09-19
Structures and methods for interconnects and associated alignment and assembly mechanisms for and between chips, components, and 3D systems Grant 10,361,471 - Rollin , et al.	2019-07-23
Integrated chip scale packages Grant 10,319,654 - Reid	2019-06-11
Integrated Chip Scale Packages App 20190172764 - Reid; J. Robert	2019-06-06
Substrate-free interconnected electronic mechanical structural systems Grant 10,257,951 - Hovey , et al.	2019-04-09
Structures and methods for interconnects and associated alignment and assembly mechanisms for and between chips, components, and 3D systems Grant 10,193,203 - Rollin , et al. Ja	2019-01-29
Substrate-free Interconnected Electronic Mechanical Structural Systems App 20180153055 - Hovey; Ian ; et al.	2018-05-31
Structures And Methods For Interconnects And Associated Alignment And Assembly Mechanisms For And Between Chips, Components, And 3d Systems App 20180123217 - Rollin; Jean-Marc ; et al.	2018-05-03
Substrate-free interconnected electronic mechanical structural systems Grant 9,888,600 - Hovey , et al. February 6, 2	2018-02-06
Stacked, switched filter banks Grant 9,660,614 - Reid May 23, 2	2017-05-23
Stacked, Switched Filter Banks App 20170033773 - Reid; J. Robert	2017-02-02
Structures And Methods For Interconnects And Associated Alignment And Assembly Mechanisms For And Between Chips, Components, And 3d Systems App 20160294035 - Rollin; Jean-Marc ; et al.	2016-10-06
Substrate-free Interconnected Electronic Mechanical Structural Systems App 20160198584 - Hovey; Ian ; et al.	2016-07-07
Microstructure including microstructural waveguide elements and/or IC chips that are mechanically interconnected to each other Grant 9,306,255 - Rollin , et al. April 5, 2	2016-04-05
Substrate-free mechanical interconnection of electronic sub-systems using a spring configuration Grant 9,306,254 - Hovey , et al. April 5, 2	2016-04-05

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.