Reeves; Richard W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Reeves; Richard W..The latest application filed is for "method and apparatus for memory access delay training".

Company Profile

0.16.7

Reeves; Richard W. - Westborough MA
Reeves; Richard W - Westborough MA US
Reeves; Richard W. - Westboro MA
Reeves; Richard W. - San Rafael CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Dynamic RAM Phy interface with configurable power states Grant 9,274,938 - Searles , et al. March 1, 2	2016-03-01
Method and apparatus for memory access delay training Grant 8,760,946 - Dearth , et al. June 24, 2	2014-06-24
Method and Apparatus for Memory Access Delay Training App 20130315014 - Dearth; Glenn A ; et al.	2013-11-28
Digital frequency synthesizer device and method thereof Grant 8,575,972 - Reeves , et al. November 5, 2	2013-11-05
Dynamic Ram Phy Interface With Configurable Power States App 20130124806 - SEARLES; Shawn ; et al.	2013-05-16
Dynamic RAM Phy interface with configurable power states Grant 8,356,155 - Searles , et al. January 15, 2	2013-01-15
Dynamic Ram Phy Interface With Configurable Power States App 20120066445 - Searles; Shawn ; et al.	2012-03-15
Digital Frequency Synthesizer Device And Method Thereof App 20100237924 - Reeves; Richard W. ; et al.	2010-09-23
System including a host connected to a plurality of memory modules via a serial memory interconnect Grant 7,421,525 - Polzin , et al. September 2, 2	2008-09-02
Arrangement for receiving and transmitting PCI-X data according to selected data modes Grant 7,269,681 - Hypher , et al. September 11, 2	2007-09-11
PCI-X error correcting code (ECC) pin sharing configuration Grant 7,269,679 - Cho , et al. September 11, 2	2007-09-11
PCI bridge device configured for using JTAG scan for writing internal control registers and outputting debug state Grant 7,257,654 - Reeves , et al. August 14, 2	2007-08-14
Alignment of local transmit clock to synchronous data transfer clock having programmable transfer rate Grant 7,256,627 - Talbot , et al. August 14, 2	2007-08-14
PCIXCAP pin input sharing configuration for additional use as PCI hot plug interface pin input Grant 7,234,015 - Cho , et al. June 19, 2	2007-06-19
Back to back connection of PCI host bridges on a single PCI bus Grant 7,103,703 - Reeves , et al. September 5, 2	2006-09-05
Method for initializing a system including a host and plurality of memory modules connected via a serial memory interconnect Grant 7,016,213 - Reeves , et al. March 21, 2	2006-03-21
Method For Initializing A System Including A Host And Plurality Of Memory Modules Connected Via A Serial Memory Interconnect App 20050162882 - Reeves, Richard W. ; et al.	2005-07-28
System including a host connected to a plurality of memory modules via a serial memory interconnet App 20040230718 - Polzin, R. Stephen ; et al.	2004-11-18
Liquid handling device and method Grant 4,586,546 - Mezei , et al. May 6, 1	1986-05-06

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