| Patent | Date |
|---|
Bit set modes for a resistive sense memory cell array
Grant 8,934,281 - Chen , et al. January 13, 2 | 2015-01-13 |
Non-volatile memory cell with resistive sense element block erase and uni-directional write
Grant 8,213,259 - Reed , et al. July 3, 2 | 2012-07-03 |
Computer memory device with multiple interfaces
Grant 8,194,437 - Chen , et al. June 5, 2 | 2012-06-05 |
Bit Set Modes for a Resistive Sense Memory Cell Array
App 20120033482 - Chen; Yiran ; et al. | 2012-02-09 |
Computer memory device with status register
Grant 8,081,504 - Chen , et al. December 20, 2 | 2011-12-20 |
Bit set modes for a resistive sense memory cell array
Grant 8,040,713 - Chen , et al. October 18, 2 | 2011-10-18 |
Simultaneously writing multiple addressable blocks of user data to a resistive sense memory cell array
Grant 7,944,729 - Chen , et al. May 17, 2 | 2011-05-17 |
Resistive sense memory array with partial block update capability
Grant 7,944,731 - Chen , et al. May 17, 2 | 2011-05-17 |
Non-volatile memory array with resistive sense element block erase and uni-directional write
Grant 7,885,097 - Reed , et al. February 8, 2 | 2011-02-08 |
Non-Volatile Memory Array With Resistive Sense Element Block Erase and Uni-Directional Write
App 20110026305 - Reed; Daniel S. ; et al. | 2011-02-03 |
Resistive Sense Memory Array With Partial Block Update Capability
App 20110029714 - Chen; Yiran ; et al. | 2011-02-03 |
Resistive sense memory array with partial block update capability
Grant 7,830,700 - Chen , et al. November 9, 2 | 2010-11-09 |
Simultaneously Writing Multiple Addressable Blocks of User Data to a Resistive Sense Memory Cell Array
App 20100188883 - Chen; Yiran ; et al. | 2010-07-29 |
Computer Memory Device With Multiple Interfaces
App 20100177562 - Chen; Yiran ; et al. | 2010-07-15 |
Bit Set Modes For A Resistive Sense Memory Cell Array
App 20100177551 - Chen; Yiran ; et al. | 2010-07-15 |
Resistive Sense Memory Array With Partial Block Update Capability
App 20100118587 - Chen; Yiran ; et al. | 2010-05-13 |
Non-Volatile Memory Array with Resistive Sense Element Block Erase and Uni-Directional Write
App 20100091548 - Reed; Daniel S. ; et al. | 2010-04-15 |
Computer Memory Device With Status Register
App 20100095050 - Chen; Yiran ; et al. | 2010-04-15 |
Two-element magnetic memory cell
Grant 7,474,569 - Reed January 6, 2 | 2009-01-06 |
Complementary giant magneto-resistive memory with full-turn word line
Grant 7,426,133 - Hynes , et al. September 16, 2 | 2008-09-16 |
Methods for fabricating giant magnetoresistive (GMR) devices
Grant 7,383,626 - Baseman , et al. June 10, 2 | 2008-06-10 |
Two-element magnetic memory cell
App 20070272036 - Reed; Daniel S. | 2007-11-29 |
MRAM read sequence using canted bit magnetization
Grant 7,248,496 - Katti , et al. July 24, 2 | 2007-07-24 |
MRAM read sequence using canted bit magnetization
App 20070109839 - Katti; Romney R. ; et al. | 2007-05-17 |
Giant magneto-resistive static read RAM memory architecture
App 20070091669 - Hynes; Owen J. ; et al. | 2007-04-26 |
Bit end design for pseudo spin valve (PSV) devices
Grant 7,183,042 - Katti , et al. February 27, 2 | 2007-02-27 |
Methods for fabricating giant magnetoresistive (GMR) devices
App 20060277747 - Baseman; Daniel L. ; et al. | 2006-12-14 |
Method for fabricating giant magnetoresistive (GMR) devices
Grant 7,114,240 - Baseman , et al. October 3, 2 | 2006-10-03 |
Method for fabricating giant magnetoresistive (GMR) devices
App 20050097725 - Baseman, Daniel L. ; et al. | 2005-05-12 |
Bit end design for pseudo spin valve (PSV) devices
App 20050101079 - Katti, Romney R. ; et al. | 2005-05-12 |
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