Reed; Brian Joy

Patent Applications and Registrations

Patent applications and USPTO patent grants for Reed; Brian Joy.The latest application filed is for "implementing precise resistance measurement for 2d array efuse bit cell using differential sense amplifier, balanced bitlines, and programmable reference resistor".

Company Profile

0.4.4

Reed; Brian Joy - Apex NC
Reed; Brian Joy - Rochester MN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Efficient compare operation Grant 9,640,250 - Hoff , et al. May 2, 2	2017-05-02
Implementing precise resistance measurement for 2D array efuse bit cell using differential sense amplifier, balanced bitlines, and programmable reference resistor Grant 7,764,531 - Aipperspach , et al. July 27, 2	2010-07-27
Method and circuit for implementing enhanced eFuse sense circuit Grant 7,729,188 - Aipperspach , et al. June 1, 2	2010-06-01
Method and circuit for implementing eFuse sense amplifier verification Grant 7,725,844 - Aipperspach , et al. May 25, 2	2010-05-25
Implementing Precise Resistance Measurement for 2D Array Efuse Bit Cell Using Differential Sense Amplifier, Balanced Bitlines, and Programmable Reference Resistor App 20100067319 - Aipperspach; Anthony Gus ; et al.	2010-03-18
Method and Circuit for Implementing Efuse Resistance Screening App 20090212850 - Aipperspach; Anthony Gus ; et al.	2009-08-27
Method and Circuit for Implementing Enhanced Efuse Sense Circuit App 20090201756 - Aipperspach; Anthony Gus ; et al.	2009-08-13
Method and Circuit for Implementing Efuse Sense Amplifier Verification App 20090201074 - Aipperspach; Anthony Gus ; et al.	2009-08-13

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